Add AArch32 DCPS{1,2,3} and HLT instructions.
[oota-llvm.git] / test / MC / ARM / basic-thumb2-instructions-v8.s
1 @ New ARMv8 T32 encodings
2
3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
4 @ RUN: not llvm-mc -triple thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
5
6 @ HLT
7         hlt  #0
8         hlt  #63
9 @ CHECK-V8: hlt  #0                       @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt  #63                      @ encoding: [0xbf,0xba]
11 @ CHECK-V7: error: instruction requires: armv8
12 @ CHECK-V7: error: instruction requires: armv8
13
14 @ In IT block
15         it pl
16         hlt #24
17
18 @ CHECK-V8: it pl                         @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24                       @ encoding: [0x98,0xba]
20 @ CHECK-V7: error: instruction requires: armv8
21
22 @ Can accept AL condition code
23         hltal #24
24 @ CHECK-V8: hlt #24                       @ encoding: [0x98,0xba]
25 @ CHECK-V7: error: instruction requires: armv8
26
27 @ DCPS{1,2,3}
28         dcps1
29         dcps2
30         dcps3
31 @ CHECK-V8: dcps1                         @ encoding: [0x8f,0xf7,0x01,0x80]
32 @ CHECK-V8: dcps2                         @ encoding: [0x8f,0xf7,0x02,0x80]
33 @ CHECK-V8: dcps3                         @ encoding: [0x8f,0xf7,0x03,0x80]
34 @ CHECK-V7: error: instruction requires: armv8
35 @ CHECK-V7: error: instruction requires: armv8
36 @ CHECK-V7: error: instruction requires: armv8