[WinEH] Remove unused intrinsic llvm.x86.seh.restoreframe
[oota-llvm.git] / test / MC / ARM / basic-thumb2-instructions-v8.s
1 @ New ARMv8 T32 encodings
2
3 @ RUN: llvm-mc -triple thumbv8 -show-encoding < %s | FileCheck %s --check-prefix=CHECK-V8
4 @ RUN: not llvm-mc -triple thumbv7 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V7
5
6 @ HLT (in ARMv8 only)
7         hlt  #0
8         hlt  #63
9 @ CHECK-V8: hlt  #0                       @ encoding: [0x80,0xba]
10 @ CHECK-V8: hlt  #63                      @ encoding: [0xbf,0xba]
11 @ CHECK-V7: error: instruction requires: armv8
12 @ CHECK-V7: error: instruction requires: armv8
13
14 @ In IT block
15         it pl
16         hlt #24
17
18 @ CHECK-V8: it pl                         @ encoding: [0x58,0xbf]
19 @ CHECK-V8: hlt #24                       @ encoding: [0x98,0xba]
20 @ CHECK-V7: error: instruction requires: armv8
21
22 @ Can accept AL condition code (in ARMv8 only)
23         hltal #24
24 @ CHECK-V8: hlt #24                       @ encoding: [0x98,0xba]
25 @ CHECK-V7: error: instruction requires: armv8
26
27 @ Can accept SP as rGPR (in ARMv8 only)
28         sbc.w r6, r3, sp, asr #16
29         and.w r6, r3, sp, asr #16
30         and sp, r0, #0
31 @ CHECK-V8: sbc.w r6, r3, sp, asr #16     @ encoding: [0x63,0xeb,0x2d,0x46]
32 @ CHECK-V8: and.w r6, r3, sp, asr #16     @ encoding: [0x03,0xea,0x2d,0x46]
33 @ CHECK-V8: and   sp, r0, #0              @ encoding: [0x00,0xf0,0x00,0x0d]
34 @ CHECK-V7: error: instruction variant requires ARMv8 or later
35 @ CHECK-V7: error: instruction variant requires ARMv8 or later
36 @ CHECK-V7: error: invalid operand for instruction
37
38 @ DCPS{1,2,3} (in ARMv8 only)
39         dcps1
40         dcps2
41         dcps3
42 @ CHECK-V8: dcps1                         @ encoding: [0x8f,0xf7,0x01,0x80]
43 @ CHECK-V8: dcps2                         @ encoding: [0x8f,0xf7,0x02,0x80]
44 @ CHECK-V8: dcps3                         @ encoding: [0x8f,0xf7,0x03,0x80]
45 @ CHECK-V7: error: instruction requires: armv8
46 @ CHECK-V7: error: instruction requires: armv8
47 @ CHECK-V7: error: instruction requires: armv8
48
49 @------------------------------------------------------------------------------
50 @ DMB (ARMv8-only barriers)
51 @------------------------------------------------------------------------------
52         dmb ishld
53         dmb oshld
54         dmb nshld
55         dmb ld
56
57 @ CHECK-V8: dmb ishld @ encoding: [0xbf,0xf3,0x59,0x8f]
58 @ CHECK-V8: dmb oshld @ encoding: [0xbf,0xf3,0x51,0x8f]
59 @ CHECK-V8: dmb nshld @ encoding: [0xbf,0xf3,0x55,0x8f]
60 @ CHECK-V8: dmb ld @ encoding: [0xbf,0xf3,0x5d,0x8f]
61 @ CHECK-V7: error: invalid operand for instruction
62 @ CHECK-V7: error: invalid operand for instruction
63 @ CHECK-V7: error: invalid operand for instruction
64 @ CHECK-V7: error: invalid operand for instruction
65
66 @------------------------------------------------------------------------------
67 @ DSB (ARMv8-only barriers)
68 @------------------------------------------------------------------------------
69         dsb ishld
70         dsb oshld
71         dsb nshld
72         dsb ld
73
74 @ CHECK-V8: dsb ishld @ encoding: [0xbf,0xf3,0x49,0x8f]
75 @ CHECK-V8: dsb oshld @ encoding: [0xbf,0xf3,0x41,0x8f]
76 @ CHECK-V8: dsb nshld @ encoding: [0xbf,0xf3,0x45,0x8f]
77 @ CHECK-V8: dsb ld @ encoding: [0xbf,0xf3,0x4d,0x8f]
78 @ CHECK-V7: error: invalid operand for instruction
79 @ CHECK-V7: error: invalid operand for instruction
80 @ CHECK-V7: error: invalid operand for instruction
81 @ CHECK-V7: error: invalid operand for instruction
82
83 @------------------------------------------------------------------------------
84 @ SEVL (in ARMv8 only)
85 @------------------------------------------------------------------------------
86         sevl
87         sevl.w
88         it ge
89         sevlge
90
91 @ CHECK-V8: sevl @ encoding: [0x50,0xbf]
92 @ CHECK-V8: sevl.w @ encoding: [0xaf,0xf3,0x05,0x80]
93 @ CHECK-V8: it ge @ encoding: [0xa8,0xbf]
94 @ CHECK-V8: sevlge @ encoding: [0x50,0xbf]
95 @ CHECK-V7: error: instruction requires: armv8
96 @ CHECK-V7: error: instruction requires: armv8
97 @ CHECK-V7: error:
98 @ CHECK-V7: error: instruction requires: armv8