Thumb assembly parsing and encoding for ADC(register) instruction.
[oota-llvm.git] / test / MC / ARM / basic-thumb-instructions.s
1 @ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
2   .syntax unified
3   .globl _func
4
5 @ Check that the assembler can handle the documented syntax from the ARM ARM.
6 @ For complex constructs like shifter operands, check more thoroughly for them
7 @ once then spot check that following instructions accept the form generally.
8 @ This gives us good coverage while keeping the overall size of the test
9 @ more reasonable.
10
11 _func:
12 @ CHECK: _func
13
14 @------------------------------------------------------------------------------
15 @ ADC (register)
16 @------------------------------------------------------------------------------
17         adcs r4, r6
18
19 @ CHECK: adcs   r4, r6                  @ encoding: [0x74,0x41]
20
21
22 @------------------------------------------------------------------------------
23 @ ADD (immediate)
24 @------------------------------------------------------------------------------
25         adds r1, r2, #3
26         adds r2, #3
27         adds r2, #8
28
29 @ CHECK: adds   r1, r2, #3              @ encoding: [0xd1,0x1c]
30 @ CHECK: adds   r2, r2, #3              @ encoding: [0xd2,0x1c]
31 @ CHECK: adds   r2, #8                  @ encoding: [0x08,0x32]
32
33
34 @------------------------------------------------------------------------------
35 @ ADD (register)
36 @------------------------------------------------------------------------------
37         adds r1, r2, r3
38         add r2, r8
39
40 @ CHECK: adds   r1, r2, r3              @ encoding: [0xd1,0x18]
41 @ CHECK: add    r2, r8                  @ encoding: [0x42,0x44]