Add support for parsing ARM arithmetic instructions that update or don't update
[oota-llvm.git] / test / MC / ARM / arm_instructions.s
1 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s | FileCheck %s
2
3 @ CHECK: nop
4 @ CHECK: encoding: [0x00,0xf0,0x20,0xe3]
5         nop
6
7 @ CHECK: nopeq
8 @ CHECK: encoding: [0x00,0xf0,0x20,0x03]
9         nopeq
10
11 @ CHECK: trap
12 @ CHECK: encoding: [0xfe,0xde,0xff,0xe7]
13         trap
14
15 @ CHECK: bx     lr
16 @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1]
17         bx lr
18
19 @ CHECK: vqdmull.s32    q8, d17, d16
20 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2]
21         vqdmull.s32     q8, d17, d16
22
23 @ CHECK: ldmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe8]
24 @ CHECK: ldmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x92,0xe9]
25 @ CHECK: ldmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe8]
26 @ CHECK: ldmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x12,0xe9]
27         ldmia     r2, {r1,r3-r6,sp}
28         ldmib     r2, {r1,r3-r6,sp}
29         ldmda     r2, {r1,r3-r6,sp}
30         ldmdb     r2, {r1,r3-r6,sp}
31
32 @ CHECK: stmia r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe8]
33 @ CHECK: stmib r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x82,0xe9]
34 @ CHECK: stmda r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe8]
35 @ CHECK: stmdb r2, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x02,0xe9]
36         stmia     r2, {r1,r3-r6,sp}
37         stmib     r2, {r1,r3-r6,sp}
38         stmda     r2, {r1,r3-r6,sp}
39         stmdb     r2, {r1,r3-r6,sp}
40
41 @ CHECK: ldmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe8]
42 @ CHECK: ldmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xb2,0xe9]
43 @ CHECK: ldmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe8]
44 @ CHECK: ldmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x32,0xe9]
45         ldmia     r2!, {r1,r3-r6,sp}
46         ldmib     r2!, {r1,r3-r6,sp}
47         ldmda     r2!, {r1,r3-r6,sp}
48         ldmdb     r2!, {r1,r3-r6,sp}
49
50 @ CHECK: stmia r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe8]
51 @ CHECK: stmib r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa2,0xe9]
52 @ CHECK: stmda r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe8]
53 @ CHECK: stmdb r2!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x22,0xe9]
54         stmia     r2!, {r1,r3-r6,sp}
55         stmib     r2!, {r1,r3-r6,sp}
56         stmda     r2!, {r1,r3-r6,sp}
57         stmdb     r2!, {r1,r3-r6,sp}
58
59 @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
60         and r1, r2, r3
61 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
62         ands r1, r2, r3
63 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
64         eor r1, r2, r3
65 @ CHECK: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
66         eors r1, r2, r3