1 // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
2 // RUN: not llvm-mc -arch=amdgcn -mcpu=SI %s 2>&1 | FileCheck %s
4 //===----------------------------------------------------------------------===//
6 //===----------------------------------------------------------------------===//
8 v_mul_i32_i24 v1, v2, 100
9 // CHECK: error: invalid operand for instruction
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
16 v_mul_i32_i24_e32 v1, v2, 100
17 // CHECK: error: invalid operand for instruction
20 v_mul_i32_i24_e32 v1, v2, s3
21 // CHECK: error: invalid operand for instruction
23 //===----------------------------------------------------------------------===//
25 //===----------------------------------------------------------------------===//
28 v_mul_i32_i24_e64 v1, 100, v3
29 // CHECK: error: invalid operand for instruction
32 v_mul_i32_i24_e64 v1, v2, 100
33 // CHECK: error: invalid operand for instruction
35 v_add_i32_e32 v1, s[0:1], v2, v3
36 // CHECK: error: invalid operand for instruction
38 v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]
39 // CHECK: error: invalid operand for instruction
41 v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]
42 // CHECK: error: invalid operand for instruction
44 v_addc_u32_e32 v1, vcc, v2, v3, -1
45 // CHECK: error: invalid operand for instruction
47 v_addc_u32_e32 v1, vcc, v2, v3, 123
48 // CHECK: error: invalid operand for instruction
50 v_addc_u32_e32 v1, vcc, v2, v3, s0
51 // CHECK: error: invalid operand for instruction
53 v_addc_u32_e32 v1, -1, v2, v3, s0
54 // CHECK: error: invalid operand for instruction
56 v_addc_u32_e64 v1, s[0:1], v2, v3, 123
57 // CHECK: error: invalid operand for instruction
59 v_addc_u32 v1, s[0:1], v2, v3, 123
60 // CHECK: error: invalid operand for instruction
62 // TODO: Constant bus restrictions