1 ; RUN: opt < %s -msan -S | FileCheck %s
2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
4 ; Check the presence of __msan_init
5 ; CHECK: @llvm.global_ctors {{.*}} @__msan_init
7 ; load followed by cmp: check that we load the shadow and call __msan_warning.
8 define void @LoadAndCmp(i32* nocapture %a) nounwind uwtable {
10 %0 = load i32* %a, align 4
11 %tobool = icmp eq i32 %0, 0
12 br i1 %tobool, label %if.end, label %if.then
14 if.then: ; preds = %entry
15 tail call void (...)* @foo() nounwind
18 if.end: ; preds = %entry, %if.then
22 declare void @foo(...)
27 ; CHECK: call void @__msan_warning_noreturn()
28 ; CHECK-NEXT: call void asm sideeffect
29 ; CHECK-NEXT: unreachable
32 ; Check that we store the shadow for the retval.
33 define i32 @ReturnInt() nounwind uwtable readnone {
39 ; CHECK: store i32 0,{{.*}}__msan_retval_tls
42 ; Check that we get the shadow for the retval.
43 define void @CopyRetVal(i32* nocapture %a) nounwind uwtable {
45 %call = tail call i32 @ReturnInt() nounwind
46 store i32 %call, i32* %a, align 4
51 ; CHECK: load{{.*}}__msan_retval_tls
57 ; Check that we generate PHIs for shadow.
58 define void @FuncWithPhi(i32* nocapture %a, i32* %b, i32* nocapture %c) nounwind uwtable {
60 %tobool = icmp eq i32* %b, null
61 br i1 %tobool, label %if.else, label %if.then
63 if.then: ; preds = %entry
64 %0 = load i32* %b, align 4
67 if.else: ; preds = %entry
68 %1 = load i32* %c, align 4
71 if.end: ; preds = %if.else, %if.then
72 %t.0 = phi i32 [ %0, %if.then ], [ %1, %if.else ]
73 store i32 %t.0, i32* %a, align 4
84 ; Compute shadow for "x << 10"
85 define void @ShlConst(i32* nocapture %x) nounwind uwtable {
87 %0 = load i32* %x, align 4
89 store i32 %1, i32* %x, align 4
102 ; Compute shadow for "10 << x": it should have 'sext i1'.
103 define void @ShlNonConst(i32* nocapture %x) nounwind uwtable {
105 %0 = load i32* %x, align 4
107 store i32 %1, i32* %x, align 4
111 ; CHECK: @ShlNonConst
120 define void @SExt(i32* nocapture %a, i16* nocapture %b) nounwind uwtable {
122 %0 = load i16* %b, align 2
123 %1 = sext i16 %0 to i32
124 store i32 %1, i32* %a, align 4
139 define void @MemSet(i8* nocapture %x) nounwind uwtable {
141 call void @llvm.memset.p0i8.i64(i8* %x, i8 42, i64 10, i32 1, i1 false)
145 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
148 ; CHECK: call i8* @__msan_memset
153 define void @MemCpy(i8* nocapture %x, i8* nocapture %y) nounwind uwtable {
155 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %x, i8* %y, i64 10, i32 1, i1 false)
159 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
162 ; CHECK: call i8* @__msan_memcpy
166 ; memmove is lowered to a call
167 define void @MemMove(i8* nocapture %x, i8* nocapture %y) nounwind uwtable {
169 call void @llvm.memmove.p0i8.p0i8.i64(i8* %x, i8* %y, i64 10, i32 1, i1 false)
173 declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
176 ; CHECK: call i8* @__msan_memmove
180 ; Check that we propagate shadow for "select"
182 define i32 @Select(i32 %a, i32 %b, i32 %c) nounwind uwtable readnone {
184 %tobool = icmp ne i32 %c, 0
185 %cond = select i1 %tobool, i32 %a, i32 %b
195 define i8* @IntToPtr(i64 %x) nounwind uwtable readnone {
197 %0 = inttoptr i64 %x to i8*
202 ; CHECK: load i64*{{.*}}__msan_param_tls
203 ; CHECK-NEXT: inttoptr
204 ; CHECK-NEXT: store i64{{.*}}__msan_retval_tls
208 define i8* @IntToPtr_ZExt(i16 %x) nounwind uwtable readnone {
210 %0 = inttoptr i16 %x to i8*
214 ; CHECK: @IntToPtr_ZExt
216 ; CHECK-NEXT: inttoptr
220 ; Check that we insert exactly one check on udiv
221 ; (2nd arg shadow is checked, 1st arg shadow is propagated)
223 define i32 @Div(i32 %a, i32 %b) nounwind uwtable readnone {
225 %div = udiv i32 %a, %b
231 ; CHECK: call void @__msan_warning
238 ; Check that we propagate shadow for x<0, x>=0, etc (i.e. sign bit tests)
240 define zeroext i1 @ICmpSLT(i32 %x) nounwind uwtable readnone {
241 %1 = icmp slt i32 %x, 0
247 ; CHECK-NOT: call void @__msan_warning
249 ; CHECK-NOT: call void @__msan_warning
252 define zeroext i1 @ICmpSGE(i32 %x) nounwind uwtable readnone {
253 %1 = icmp sge i32 %x, 0
259 ; CHECK-NOT: call void @__msan_warning
261 ; CHECK-NOT: call void @__msan_warning
264 define zeroext i1 @ICmpSGT(i32 %x) nounwind uwtable readnone {
265 %1 = icmp sgt i32 0, %x
271 ; CHECK-NOT: call void @__msan_warning
273 ; CHECK-NOT: call void @__msan_warning
276 define zeroext i1 @ICmpSLE(i32 %x) nounwind uwtable readnone {
277 %1 = icmp sle i32 0, %x
283 ; CHECK-NOT: call void @__msan_warning
285 ; CHECK-NOT: call void @__msan_warning
289 ; Check that loads from shadow have the same aligment as the original loads.
291 define i32 @ShadowLoadAlignmentLarge() nounwind uwtable {
292 %y = alloca i32, align 64
293 %1 = load volatile i32* %y, align 64
297 ; CHECK: @ShadowLoadAlignmentLarge
298 ; CHECK: load i32* {{.*}} align 64
299 ; CHECK: load volatile i32* {{.*}} align 64
302 define i32 @ShadowLoadAlignmentSmall() nounwind uwtable {
303 %y = alloca i32, align 2
304 %1 = load volatile i32* %y, align 2
308 ; CHECK: @ShadowLoadAlignmentSmall
309 ; CHECK: load i32* {{.*}} align 2
310 ; CHECK: load volatile i32* {{.*}} align 2
314 ; Test vector manipulation instructions.
315 ; Check that the same bit manipulation is applied to the shadow values.
316 ; Check that there is a zero test of the shadow of %idx argument, where present.
318 define i32 @ExtractElement(<4 x i32> %vec, i32 %idx) {
319 %x = extractelement <4 x i32> %vec, i32 %idx
323 ; CHECK: @ExtractElement
324 ; CHECK: extractelement
325 ; CHECK: call void @__msan_warning
326 ; CHECK: extractelement
329 define <4 x i32> @InsertElement(<4 x i32> %vec, i32 %idx, i32 %x) {
330 %vec1 = insertelement <4 x i32> %vec, i32 %x, i32 %idx
334 ; CHECK: @InsertElement
335 ; CHECK: insertelement
336 ; CHECK: call void @__msan_warning
337 ; CHECK: insertelement
338 ; CHECK: ret <4 x i32>
340 define <4 x i32> @ShuffleVector(<4 x i32> %vec, <4 x i32> %vec1) {
341 %vec2 = shufflevector <4 x i32> %vec, <4 x i32> %vec1,
342 <4 x i32> <i32 0, i32 4, i32 1, i32 5>
346 ; CHECK: @ShuffleVector
347 ; CHECK: shufflevector
348 ; CHECK-NOT: call void @__msan_warning
349 ; CHECK: shufflevector
350 ; CHECK: ret <4 x i32>