This patch handles unaligned loads and stores in Mips JIT. Mips backend
[oota-llvm.git] / test / Feature / intrinsics.ll
1 ; RUN: llvm-as < %s | llvm-dis > %t1.ll
2 ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll
3 ; RUN: diff %t1.ll %t2.ll
4
5 declare i1 @llvm.isunordered.f32(float, float)
6
7 declare i1 @llvm.isunordered.f64(double, double)
8
9 declare void @llvm.prefetch(i8*, i32, i32)
10
11 declare i8 @llvm.ctpop.i8(i8)
12
13 declare i16 @llvm.ctpop.i16(i16)
14
15 declare i32 @llvm.ctpop.i32(i32)
16
17 declare i64 @llvm.ctpop.i64(i64)
18
19 declare i8 @llvm.cttz.i8(i8)
20
21 declare i16 @llvm.cttz.i16(i16)
22
23 declare i32 @llvm.cttz.i32(i32)
24
25 declare i64 @llvm.cttz.i64(i64)
26
27 declare i8 @llvm.ctlz.i8(i8)
28
29 declare i16 @llvm.ctlz.i16(i16)
30
31 declare i32 @llvm.ctlz.i32(i32)
32
33 declare i64 @llvm.ctlz.i64(i64)
34
35 declare float @llvm.sqrt.f32(float)
36
37 declare double @llvm.sqrt.f64(double)
38
39 ; Test llvm intrinsics
40 ;
41 define void @libm() {
42         fcmp uno float 1.000000e+00, 2.000000e+00               ; <i1>:1 [#uses=0]
43         fcmp uno double 3.000000e+00, 4.000000e+00              ; <i1>:2 [#uses=0]
44         call void @llvm.prefetch( i8* null, i32 1, i32 3 )
45         call float @llvm.sqrt.f32( float 5.000000e+00 )         ; <float>:3 [#uses=0]
46         call double @llvm.sqrt.f64( double 6.000000e+00 )               ; <double>:4 [#uses=0]
47         call i8  @llvm.ctpop.i8( i8 10 )                ; <i32>:5 [#uses=0]
48         call i16 @llvm.ctpop.i16( i16 11 )              ; <i32>:6 [#uses=0]
49         call i32 @llvm.ctpop.i32( i32 12 )              ; <i32>:7 [#uses=0]
50         call i64 @llvm.ctpop.i64( i64 13 )              ; <i32>:8 [#uses=0]
51         call i8  @llvm.ctlz.i8( i8 14 )         ; <i32>:9 [#uses=0]
52         call i16 @llvm.ctlz.i16( i16 15 )               ; <i32>:10 [#uses=0]
53         call i32 @llvm.ctlz.i32( i32 16 )               ; <i32>:11 [#uses=0]
54         call i64 @llvm.ctlz.i64( i64 17 )               ; <i32>:12 [#uses=0]
55         call i8  @llvm.cttz.i8( i8 18 )         ; <i32>:13 [#uses=0]
56         call i16 @llvm.cttz.i16( i16 19 )               ; <i32>:14 [#uses=0]
57         call i32 @llvm.cttz.i32( i32 20 )               ; <i32>:15 [#uses=0]
58         call i64 @llvm.cttz.i64( i64 21 )               ; <i32>:16 [#uses=0]
59         ret void
60 }
61
62 ; FIXME: test ALL the intrinsics in this file.