1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7 define <8 x i32> @zext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
8 ; SSE2-LABEL: zext_8i16_to_8i32:
9 ; SSE2: # BB#0: # %entry
10 ; SSE2-NEXT: movdqa %xmm0, %xmm2
11 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
12 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]
13 ; SSE2-NEXT: pand %xmm1, %xmm2
14 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
15 ; SSE2-NEXT: pand %xmm0, %xmm1
16 ; SSE2-NEXT: movdqa %xmm2, %xmm0
19 ; SSSE3-LABEL: zext_8i16_to_8i32:
20 ; SSSE3: # BB#0: # %entry
21 ; SSSE3-NEXT: movdqa %xmm0, %xmm2
22 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
23 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]
24 ; SSSE3-NEXT: pand %xmm1, %xmm2
25 ; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
26 ; SSSE3-NEXT: pand %xmm0, %xmm1
27 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
30 ; SSE41-LABEL: zext_8i16_to_8i32:
31 ; SSE41: # BB#0: # %entry
32 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
33 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535]
34 ; SSE41-NEXT: pand %xmm1, %xmm2
35 ; SSE41-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
36 ; SSE41-NEXT: pand %xmm0, %xmm1
37 ; SSE41-NEXT: movdqa %xmm2, %xmm0
40 ; AVX1-LABEL: zext_8i16_to_8i32:
41 ; AVX1: # BB#0: # %entry
42 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
43 ; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
44 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
45 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
48 ; AVX2-LABEL: zext_8i16_to_8i32:
49 ; AVX2: # BB#0: # %entry
50 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
53 %B = zext <8 x i16> %A to <8 x i32>
57 define <4 x i64> @zext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
58 ; SSE2-LABEL: zext_4i32_to_4i64:
59 ; SSE2: # BB#0: # %entry
60 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,1,1,3]
61 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [4294967295,4294967295]
62 ; SSE2-NEXT: pand %xmm3, %xmm2
63 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
64 ; SSE2-NEXT: pand %xmm3, %xmm1
65 ; SSE2-NEXT: movdqa %xmm2, %xmm0
68 ; SSSE3-LABEL: zext_4i32_to_4i64:
69 ; SSSE3: # BB#0: # %entry
70 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,1,1,3]
71 ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [4294967295,4294967295]
72 ; SSSE3-NEXT: pand %xmm3, %xmm2
73 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
74 ; SSSE3-NEXT: pand %xmm3, %xmm1
75 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
78 ; SSE41-LABEL: zext_4i32_to_4i64:
79 ; SSE41: # BB#0: # %entry
80 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
81 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [4294967295,4294967295]
82 ; SSE41-NEXT: pand %xmm3, %xmm2
83 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
84 ; SSE41-NEXT: pand %xmm3, %xmm1
85 ; SSE41-NEXT: movdqa %xmm2, %xmm0
88 ; AVX1-LABEL: zext_4i32_to_4i64:
89 ; AVX1: # BB#0: # %entry
90 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
91 ; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm1 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
92 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
93 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
96 ; AVX2-LABEL: zext_4i32_to_4i64:
97 ; AVX2: # BB#0: # %entry
98 ; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
101 %B = zext <4 x i32> %A to <4 x i64>
105 define <8 x i32> @zext_8i8_to_8i32(<8 x i8> %z) {
106 ; SSE2-LABEL: zext_8i8_to_8i32:
107 ; SSE2: # BB#0: # %entry
108 ; SSE2-NEXT: movdqa %xmm0, %xmm2
109 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
110 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255]
111 ; SSE2-NEXT: pand %xmm1, %xmm2
112 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
113 ; SSE2-NEXT: pand %xmm0, %xmm1
114 ; SSE2-NEXT: movdqa %xmm2, %xmm0
117 ; SSSE3-LABEL: zext_8i8_to_8i32:
118 ; SSSE3: # BB#0: # %entry
119 ; SSSE3-NEXT: movdqa %xmm0, %xmm2
120 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
121 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255]
122 ; SSSE3-NEXT: pand %xmm1, %xmm2
123 ; SSSE3-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
124 ; SSSE3-NEXT: pand %xmm0, %xmm1
125 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
128 ; SSE41-LABEL: zext_8i8_to_8i32:
129 ; SSE41: # BB#0: # %entry
130 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
131 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255]
132 ; SSE41-NEXT: pand %xmm1, %xmm2
133 ; SSE41-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
134 ; SSE41-NEXT: pand %xmm0, %xmm1
135 ; SSE41-NEXT: movdqa %xmm2, %xmm0
138 ; AVX1-LABEL: zext_8i8_to_8i32:
139 ; AVX1: # BB#0: # %entry
140 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
141 ; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
142 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
143 ; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
146 ; AVX2-LABEL: zext_8i8_to_8i32:
147 ; AVX2: # BB#0: # %entry
148 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
149 ; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1
150 ; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
153 %t = zext <8 x i8> %z to <8 x i32>
158 define <16 x i16> @zext_16i8_to_16i16(<16 x i8> %z) {
159 ; SSE2-LABEL: zext_16i8_to_16i16:
160 ; SSE2: # BB#0: # %entry
161 ; SSE2-NEXT: movdqa %xmm0, %xmm2
162 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
163 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255]
164 ; SSE2-NEXT: pand %xmm1, %xmm2
165 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
166 ; SSE2-NEXT: pand %xmm0, %xmm1
167 ; SSE2-NEXT: movdqa %xmm2, %xmm0
170 ; SSSE3-LABEL: zext_16i8_to_16i16:
171 ; SSSE3: # BB#0: # %entry
172 ; SSSE3-NEXT: movdqa %xmm0, %xmm2
173 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
174 ; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255]
175 ; SSSE3-NEXT: pand %xmm1, %xmm2
176 ; SSSE3-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
177 ; SSSE3-NEXT: pand %xmm0, %xmm1
178 ; SSSE3-NEXT: movdqa %xmm2, %xmm0
181 ; SSE41-LABEL: zext_16i8_to_16i16:
182 ; SSE41: # BB#0: # %entry
183 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
184 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255]
185 ; SSE41-NEXT: pand %xmm1, %xmm2
186 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
187 ; SSE41-NEXT: pand %xmm0, %xmm1
188 ; SSE41-NEXT: movdqa %xmm2, %xmm0
191 ; AVX1-LABEL: zext_16i8_to_16i16:
192 ; AVX1: # BB#0: # %entry
193 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
194 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
195 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
196 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
199 ; AVX2-LABEL: zext_16i8_to_16i16:
200 ; AVX2: # BB#0: # %entry
201 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
204 %t = zext <16 x i8> %z to <16 x i16>
208 define <16 x i16> @load_zext_16i8_to_16i16(<16 x i8> *%ptr) {
209 ; SSE2-LABEL: load_zext_16i8_to_16i16:
210 ; SSE2: # BB#0: # %entry
211 ; SSE2-NEXT: movdqa (%rdi), %xmm1
212 ; SSE2-NEXT: movdqa %xmm1, %xmm0
213 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
214 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
215 ; SSE2-NEXT: pand %xmm2, %xmm0
216 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
217 ; SSE2-NEXT: pand %xmm2, %xmm1
220 ; SSSE3-LABEL: load_zext_16i8_to_16i16:
221 ; SSSE3: # BB#0: # %entry
222 ; SSSE3-NEXT: movdqa (%rdi), %xmm1
223 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
224 ; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
225 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
226 ; SSSE3-NEXT: pand %xmm2, %xmm0
227 ; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
228 ; SSSE3-NEXT: pand %xmm2, %xmm1
231 ; SSE41-LABEL: load_zext_16i8_to_16i16:
232 ; SSE41: # BB#0: # %entry
233 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
234 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
237 ; AVX1-LABEL: load_zext_16i8_to_16i16:
238 ; AVX1: # BB#0: # %entry
239 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
240 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
241 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
244 ; AVX2-LABEL: load_zext_16i8_to_16i16:
245 ; AVX2: # BB#0: # %entry
246 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero
249 %X = load <16 x i8>* %ptr
250 %Y = zext <16 x i8> %X to <16 x i16>
254 define <8 x i32> @load_zext_8i16_to_8i32(<8 x i16> *%ptr) {
255 ; SSE2-LABEL: load_zext_8i16_to_8i32:
256 ; SSE2: # BB#0: # %entry
257 ; SSE2-NEXT: movdqa (%rdi), %xmm1
258 ; SSE2-NEXT: movdqa %xmm1, %xmm0
259 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
260 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,65535,65535,65535]
261 ; SSE2-NEXT: pand %xmm2, %xmm0
262 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
263 ; SSE2-NEXT: pand %xmm2, %xmm1
266 ; SSSE3-LABEL: load_zext_8i16_to_8i32:
267 ; SSSE3: # BB#0: # %entry
268 ; SSSE3-NEXT: movdqa (%rdi), %xmm1
269 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
270 ; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
271 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [65535,65535,65535,65535]
272 ; SSSE3-NEXT: pand %xmm2, %xmm0
273 ; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
274 ; SSSE3-NEXT: pand %xmm2, %xmm1
277 ; SSE41-LABEL: load_zext_8i16_to_8i32:
278 ; SSE41: # BB#0: # %entry
279 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
280 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
283 ; AVX1-LABEL: load_zext_8i16_to_8i32:
284 ; AVX1: # BB#0: # %entry
285 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
286 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
287 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
290 ; AVX2-LABEL: load_zext_8i16_to_8i32:
291 ; AVX2: # BB#0: # %entry
292 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
295 %X = load <8 x i16>* %ptr
296 %Y = zext <8 x i16> %X to <8 x i32>
300 define <4 x i64> @load_zext_4i32_to_4i64(<4 x i32> *%ptr) {
301 ; SSE2-LABEL: load_zext_4i32_to_4i64:
302 ; SSE2: # BB#0: # %entry
303 ; SSE2-NEXT: movdqa (%rdi), %xmm1
304 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
305 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967295]
306 ; SSE2-NEXT: pand %xmm2, %xmm0
307 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
308 ; SSE2-NEXT: pand %xmm2, %xmm1
311 ; SSSE3-LABEL: load_zext_4i32_to_4i64:
312 ; SSSE3: # BB#0: # %entry
313 ; SSSE3-NEXT: movdqa (%rdi), %xmm1
314 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
315 ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967295]
316 ; SSSE3-NEXT: pand %xmm2, %xmm0
317 ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
318 ; SSSE3-NEXT: pand %xmm2, %xmm1
321 ; SSE41-LABEL: load_zext_4i32_to_4i64:
322 ; SSE41: # BB#0: # %entry
323 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
324 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
327 ; AVX1-LABEL: load_zext_4i32_to_4i64:
328 ; AVX1: # BB#0: # %entry
329 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
330 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
331 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
334 ; AVX2-LABEL: load_zext_4i32_to_4i64:
335 ; AVX2: # BB#0: # %entry
336 ; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
339 %X = load <4 x i32>* %ptr
340 %Y = zext <4 x i32> %X to <4 x i64>