1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE2-LABEL: shuffle_v4f32_4zzz:
443 ; SSE2-NEXT: xorps %xmm1, %xmm1
444 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
445 ; SSE2-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-LABEL: shuffle_v4f32_4zzz:
450 ; SSE3-NEXT: xorps %xmm1, %xmm1
451 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
452 ; SSE3-NEXT: movaps %xmm1, %xmm0
455 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
457 ; SSSE3-NEXT: xorps %xmm1, %xmm1
458 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
459 ; SSSE3-NEXT: movaps %xmm1, %xmm0
462 ; SSE41-LABEL: shuffle_v4f32_4zzz:
464 ; SSE41-NEXT: xorps %xmm1, %xmm1
465 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
468 ; AVX-LABEL: shuffle_v4f32_4zzz:
470 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
471 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
473 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
474 ret <4 x float> %shuffle
477 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
478 ; SSE2-LABEL: shuffle_v4f32_z4zz:
480 ; SSE2-NEXT: xorps %xmm1, %xmm1
481 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
482 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
485 ; SSE3-LABEL: shuffle_v4f32_z4zz:
487 ; SSE3-NEXT: xorps %xmm1, %xmm1
488 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
489 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
492 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
494 ; SSSE3-NEXT: xorps %xmm1, %xmm1
495 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
496 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
499 ; SSE41-LABEL: shuffle_v4f32_z4zz:
501 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
504 ; AVX-LABEL: shuffle_v4f32_z4zz:
506 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
508 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
509 ret <4 x float> %shuffle
512 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
513 ; SSE2-LABEL: shuffle_v4f32_zz4z:
515 ; SSE2-NEXT: xorps %xmm1, %xmm1
516 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
517 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
518 ; SSE2-NEXT: movaps %xmm1, %xmm0
521 ; SSE3-LABEL: shuffle_v4f32_zz4z:
523 ; SSE3-NEXT: xorps %xmm1, %xmm1
524 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
525 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
526 ; SSE3-NEXT: movaps %xmm1, %xmm0
529 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
531 ; SSSE3-NEXT: xorps %xmm1, %xmm1
532 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
533 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
534 ; SSSE3-NEXT: movaps %xmm1, %xmm0
537 ; SSE41-LABEL: shuffle_v4f32_zz4z:
539 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
542 ; AVX-LABEL: shuffle_v4f32_zz4z:
544 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
546 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
547 ret <4 x float> %shuffle
550 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
551 ; SSE2-LABEL: shuffle_v4f32_zuu4:
553 ; SSE2-NEXT: xorps %xmm1, %xmm1
554 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
555 ; SSE2-NEXT: movaps %xmm1, %xmm0
558 ; SSE3-LABEL: shuffle_v4f32_zuu4:
560 ; SSE3-NEXT: xorps %xmm1, %xmm1
561 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
562 ; SSE3-NEXT: movaps %xmm1, %xmm0
565 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
567 ; SSSE3-NEXT: xorps %xmm1, %xmm1
568 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
569 ; SSSE3-NEXT: movaps %xmm1, %xmm0
572 ; SSE41-LABEL: shuffle_v4f32_zuu4:
574 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
577 ; AVX-LABEL: shuffle_v4f32_zuu4:
579 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
581 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
582 ret <4 x float> %shuffle
585 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
586 ; SSE2-LABEL: shuffle_v4f32_zzz7:
588 ; SSE2-NEXT: xorps %xmm1, %xmm1
589 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
590 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
591 ; SSE2-NEXT: movaps %xmm1, %xmm0
594 ; SSE3-LABEL: shuffle_v4f32_zzz7:
596 ; SSE3-NEXT: xorps %xmm1, %xmm1
597 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
598 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
599 ; SSE3-NEXT: movaps %xmm1, %xmm0
602 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
604 ; SSSE3-NEXT: xorps %xmm1, %xmm1
605 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
606 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
607 ; SSSE3-NEXT: movaps %xmm1, %xmm0
610 ; SSE41-LABEL: shuffle_v4f32_zzz7:
612 ; SSE41-NEXT: xorps %xmm1, %xmm1
613 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
616 ; AVX-LABEL: shuffle_v4f32_zzz7:
618 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
619 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
621 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
622 ret <4 x float> %shuffle
625 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
626 ; SSE2-LABEL: shuffle_v4f32_z6zz:
628 ; SSE2-NEXT: xorps %xmm1, %xmm1
629 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
630 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
633 ; SSE3-LABEL: shuffle_v4f32_z6zz:
635 ; SSE3-NEXT: xorps %xmm1, %xmm1
636 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
637 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
640 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
642 ; SSSE3-NEXT: xorps %xmm1, %xmm1
643 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
644 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
647 ; SSE41-LABEL: shuffle_v4f32_z6zz:
649 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
652 ; AVX-LABEL: shuffle_v4f32_z6zz:
654 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
656 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
657 ret <4 x float> %shuffle
660 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
661 ; SSE2-LABEL: shuffle_v4f32_0z23:
663 ; SSE2-NEXT: xorps %xmm1, %xmm1
664 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
665 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
666 ; SSE2-NEXT: movaps %xmm1, %xmm0
669 ; SSE3-LABEL: shuffle_v4f32_0z23:
671 ; SSE3-NEXT: xorps %xmm1, %xmm1
672 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
673 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
674 ; SSE3-NEXT: movaps %xmm1, %xmm0
677 ; SSSE3-LABEL: shuffle_v4f32_0z23:
679 ; SSSE3-NEXT: xorps %xmm1, %xmm1
680 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
681 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
682 ; SSSE3-NEXT: movaps %xmm1, %xmm0
685 ; SSE41-LABEL: shuffle_v4f32_0z23:
687 ; SSE41-NEXT: xorps %xmm1, %xmm1
688 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
691 ; AVX-LABEL: shuffle_v4f32_0z23:
693 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
694 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
696 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
697 ret <4 x float> %shuffle
700 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
701 ; SSE2-LABEL: shuffle_v4f32_01z3:
703 ; SSE2-NEXT: xorps %xmm1, %xmm1
704 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
705 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
708 ; SSE3-LABEL: shuffle_v4f32_01z3:
710 ; SSE3-NEXT: xorps %xmm1, %xmm1
711 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
712 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
715 ; SSSE3-LABEL: shuffle_v4f32_01z3:
717 ; SSSE3-NEXT: xorps %xmm1, %xmm1
718 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
719 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
722 ; SSE41-LABEL: shuffle_v4f32_01z3:
724 ; SSE41-NEXT: xorps %xmm1, %xmm1
725 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
728 ; AVX-LABEL: shuffle_v4f32_01z3:
730 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
731 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
733 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
734 ret <4 x float> %shuffle
737 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
738 ; SSE2-LABEL: shuffle_v4f32_012z:
740 ; SSE2-NEXT: xorps %xmm1, %xmm1
741 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
742 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
745 ; SSE3-LABEL: shuffle_v4f32_012z:
747 ; SSE3-NEXT: xorps %xmm1, %xmm1
748 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
749 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
752 ; SSSE3-LABEL: shuffle_v4f32_012z:
754 ; SSSE3-NEXT: xorps %xmm1, %xmm1
755 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
756 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
759 ; SSE41-LABEL: shuffle_v4f32_012z:
761 ; SSE41-NEXT: xorps %xmm1, %xmm1
762 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
765 ; AVX-LABEL: shuffle_v4f32_012z:
767 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
768 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
770 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
771 ret <4 x float> %shuffle
774 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
775 ; SSE2-LABEL: shuffle_v4f32_0zz3:
777 ; SSE2-NEXT: xorps %xmm1, %xmm1
778 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
779 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
782 ; SSE3-LABEL: shuffle_v4f32_0zz3:
784 ; SSE3-NEXT: xorps %xmm1, %xmm1
785 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
786 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
789 ; SSSE3-LABEL: shuffle_v4f32_0zz3:
791 ; SSSE3-NEXT: xorps %xmm1, %xmm1
792 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
793 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
796 ; SSE41-LABEL: shuffle_v4f32_0zz3:
798 ; SSE41-NEXT: xorps %xmm1, %xmm1
799 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
802 ; AVX-LABEL: shuffle_v4f32_0zz3:
804 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
805 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
807 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
808 ret <4 x float> %shuffle
811 define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float> %b) {
812 ; SSE-LABEL: shuffle_v4f32_u051:
814 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
815 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
818 ; AVX-LABEL: shuffle_v4f32_u051:
820 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
821 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
823 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 undef, i32 0, i32 5, i32 1>
824 ret <4 x float> %shuffle
827 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
828 ; SSE2-LABEL: shuffle_v4i32_4zzz:
830 ; SSE2-NEXT: xorps %xmm1, %xmm1
831 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
832 ; SSE2-NEXT: movaps %xmm1, %xmm0
835 ; SSE3-LABEL: shuffle_v4i32_4zzz:
837 ; SSE3-NEXT: xorps %xmm1, %xmm1
838 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
839 ; SSE3-NEXT: movaps %xmm1, %xmm0
842 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
844 ; SSSE3-NEXT: xorps %xmm1, %xmm1
845 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
846 ; SSSE3-NEXT: movaps %xmm1, %xmm0
849 ; SSE41-LABEL: shuffle_v4i32_4zzz:
851 ; SSE41-NEXT: pxor %xmm1, %xmm1
852 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
855 ; AVX-LABEL: shuffle_v4i32_4zzz:
857 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
858 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
860 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
861 ret <4 x i32> %shuffle
864 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
865 ; SSE2-LABEL: shuffle_v4i32_z4zz:
867 ; SSE2-NEXT: xorps %xmm1, %xmm1
868 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
869 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
872 ; SSE3-LABEL: shuffle_v4i32_z4zz:
874 ; SSE3-NEXT: xorps %xmm1, %xmm1
875 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
876 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
879 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
881 ; SSSE3-NEXT: xorps %xmm1, %xmm1
882 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
883 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
886 ; SSE41-LABEL: shuffle_v4i32_z4zz:
888 ; SSE41-NEXT: pxor %xmm1, %xmm1
889 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
890 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
893 ; AVX-LABEL: shuffle_v4i32_z4zz:
895 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
896 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
897 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
899 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
900 ret <4 x i32> %shuffle
903 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
904 ; SSE2-LABEL: shuffle_v4i32_zz4z:
906 ; SSE2-NEXT: xorps %xmm1, %xmm1
907 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
908 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
911 ; SSE3-LABEL: shuffle_v4i32_zz4z:
913 ; SSE3-NEXT: xorps %xmm1, %xmm1
914 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
915 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
918 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
920 ; SSSE3-NEXT: xorps %xmm1, %xmm1
921 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
922 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
925 ; SSE41-LABEL: shuffle_v4i32_zz4z:
927 ; SSE41-NEXT: pxor %xmm1, %xmm1
928 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
929 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
932 ; AVX-LABEL: shuffle_v4i32_zz4z:
934 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
935 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
936 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
938 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
939 ret <4 x i32> %shuffle
942 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
943 ; SSE-LABEL: shuffle_v4i32_zuu4:
945 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
948 ; AVX-LABEL: shuffle_v4i32_zuu4:
950 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
952 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
953 ret <4 x i32> %shuffle
956 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
957 ; SSE2-LABEL: shuffle_v4i32_z6zz:
959 ; SSE2-NEXT: xorps %xmm1, %xmm1
960 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
961 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
964 ; SSE3-LABEL: shuffle_v4i32_z6zz:
966 ; SSE3-NEXT: xorps %xmm1, %xmm1
967 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
968 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
971 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
973 ; SSSE3-NEXT: xorps %xmm1, %xmm1
974 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
975 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
978 ; SSE41-LABEL: shuffle_v4i32_z6zz:
980 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
983 ; AVX-LABEL: shuffle_v4i32_z6zz:
985 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
987 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
988 ret <4 x i32> %shuffle
991 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
992 ; SSE2-LABEL: shuffle_v4i32_7012:
994 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
995 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
996 ; SSE2-NEXT: movaps %xmm1, %xmm0
999 ; SSE3-LABEL: shuffle_v4i32_7012:
1001 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1002 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1003 ; SSE3-NEXT: movaps %xmm1, %xmm0
1006 ; SSSE3-LABEL: shuffle_v4i32_7012:
1008 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1011 ; SSE41-LABEL: shuffle_v4i32_7012:
1013 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1016 ; AVX-LABEL: shuffle_v4i32_7012:
1018 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1020 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
1021 ret <4 x i32> %shuffle
1024 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
1025 ; SSE2-LABEL: shuffle_v4i32_6701:
1027 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1028 ; SSE2-NEXT: movapd %xmm1, %xmm0
1031 ; SSE3-LABEL: shuffle_v4i32_6701:
1033 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1034 ; SSE3-NEXT: movapd %xmm1, %xmm0
1037 ; SSSE3-LABEL: shuffle_v4i32_6701:
1039 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1042 ; SSE41-LABEL: shuffle_v4i32_6701:
1044 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1047 ; AVX-LABEL: shuffle_v4i32_6701:
1049 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1051 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
1052 ret <4 x i32> %shuffle
1055 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
1056 ; SSE2-LABEL: shuffle_v4i32_5670:
1058 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1059 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1060 ; SSE2-NEXT: movaps %xmm1, %xmm0
1063 ; SSE3-LABEL: shuffle_v4i32_5670:
1065 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1066 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1067 ; SSE3-NEXT: movaps %xmm1, %xmm0
1070 ; SSSE3-LABEL: shuffle_v4i32_5670:
1072 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1075 ; SSE41-LABEL: shuffle_v4i32_5670:
1077 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1080 ; AVX-LABEL: shuffle_v4i32_5670:
1082 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1084 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1085 ret <4 x i32> %shuffle
1088 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1089 ; SSE2-LABEL: shuffle_v4i32_1234:
1091 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1092 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1095 ; SSE3-LABEL: shuffle_v4i32_1234:
1097 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1098 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1101 ; SSSE3-LABEL: shuffle_v4i32_1234:
1103 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1104 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1107 ; SSE41-LABEL: shuffle_v4i32_1234:
1109 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1110 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1113 ; AVX-LABEL: shuffle_v4i32_1234:
1115 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1117 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1118 ret <4 x i32> %shuffle
1121 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1122 ; SSE2-LABEL: shuffle_v4i32_2345:
1124 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1127 ; SSE3-LABEL: shuffle_v4i32_2345:
1129 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1132 ; SSSE3-LABEL: shuffle_v4i32_2345:
1134 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1135 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1138 ; SSE41-LABEL: shuffle_v4i32_2345:
1140 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1141 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1144 ; AVX-LABEL: shuffle_v4i32_2345:
1146 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1148 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1149 ret <4 x i32> %shuffle
1152 define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
1153 ; SSE-LABEL: shuffle_v4i32_40u1:
1155 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
1156 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[2,1]
1157 ; SSE-NEXT: movaps %xmm1, %xmm0
1160 ; AVX-LABEL: shuffle_v4i32_40u1:
1162 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
1163 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[2,1]
1165 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
1166 ret <4 x i32> %shuffle
1169 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1170 ; SSE2-LABEL: shuffle_v4i32_3456:
1172 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1173 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1176 ; SSE3-LABEL: shuffle_v4i32_3456:
1178 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1179 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1182 ; SSSE3-LABEL: shuffle_v4i32_3456:
1184 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1185 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1188 ; SSE41-LABEL: shuffle_v4i32_3456:
1190 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1191 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1194 ; AVX-LABEL: shuffle_v4i32_3456:
1196 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1198 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1199 ret <4 x i32> %shuffle
1202 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1203 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1205 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1208 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1210 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1213 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1215 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1218 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1220 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1223 ; AVX-LABEL: shuffle_v4i32_0u1u:
1225 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1227 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1228 ret <4 x i32> %shuffle
1231 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1232 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1234 ; SSE2-NEXT: pxor %xmm1, %xmm1
1235 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1238 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1240 ; SSE3-NEXT: pxor %xmm1, %xmm1
1241 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1244 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1246 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1247 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1250 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1252 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1255 ; AVX-LABEL: shuffle_v4i32_0z1z:
1257 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1259 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1260 ret <4 x i32> %shuffle
1263 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1264 ; SSE-LABEL: shuffle_v4i32_01zu:
1266 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1269 ; AVX-LABEL: shuffle_v4i32_01zu:
1271 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1273 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1274 ret <4 x i32> %shuffle
1277 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1278 ; SSE2-LABEL: shuffle_v4i32_0z23:
1280 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1283 ; SSE3-LABEL: shuffle_v4i32_0z23:
1285 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1288 ; SSSE3-LABEL: shuffle_v4i32_0z23:
1290 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1293 ; SSE41-LABEL: shuffle_v4i32_0z23:
1295 ; SSE41-NEXT: pxor %xmm1, %xmm1
1296 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1299 ; AVX1-LABEL: shuffle_v4i32_0z23:
1301 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1302 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1305 ; AVX2-LABEL: shuffle_v4i32_0z23:
1307 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1308 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1310 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1311 ret <4 x i32> %shuffle
1314 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1315 ; SSE2-LABEL: shuffle_v4i32_01z3:
1317 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1320 ; SSE3-LABEL: shuffle_v4i32_01z3:
1322 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1325 ; SSSE3-LABEL: shuffle_v4i32_01z3:
1327 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1330 ; SSE41-LABEL: shuffle_v4i32_01z3:
1332 ; SSE41-NEXT: pxor %xmm1, %xmm1
1333 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1336 ; AVX1-LABEL: shuffle_v4i32_01z3:
1338 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1339 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1342 ; AVX2-LABEL: shuffle_v4i32_01z3:
1344 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1345 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1348 ret <4 x i32> %shuffle
1351 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1352 ; SSE2-LABEL: shuffle_v4i32_012z:
1354 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1357 ; SSE3-LABEL: shuffle_v4i32_012z:
1359 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1362 ; SSSE3-LABEL: shuffle_v4i32_012z:
1364 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1367 ; SSE41-LABEL: shuffle_v4i32_012z:
1369 ; SSE41-NEXT: pxor %xmm1, %xmm1
1370 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1373 ; AVX1-LABEL: shuffle_v4i32_012z:
1375 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1376 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1379 ; AVX2-LABEL: shuffle_v4i32_012z:
1381 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1382 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1384 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1385 ret <4 x i32> %shuffle
1388 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1389 ; SSE2-LABEL: shuffle_v4i32_0zz3:
1391 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1394 ; SSE3-LABEL: shuffle_v4i32_0zz3:
1396 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1399 ; SSSE3-LABEL: shuffle_v4i32_0zz3:
1401 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1404 ; SSE41-LABEL: shuffle_v4i32_0zz3:
1406 ; SSE41-NEXT: pxor %xmm1, %xmm1
1407 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1410 ; AVX1-LABEL: shuffle_v4i32_0zz3:
1412 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1413 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1416 ; AVX2-LABEL: shuffle_v4i32_0zz3:
1418 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1419 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1422 ret <4 x i32> %shuffle
1425 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1426 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1428 ; SSE-NEXT: movd %edi, %xmm0
1431 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1433 ; AVX-NEXT: vmovd %edi, %xmm0
1435 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1436 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1437 ret <4 x i32> %shuffle
1440 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1441 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1443 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1446 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1448 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1451 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1452 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1453 ret <4 x i32> %shuffle
1456 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1457 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1459 ; SSE2-NEXT: xorps %xmm1, %xmm1
1460 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1461 ; SSE2-NEXT: movaps %xmm1, %xmm0
1464 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1466 ; SSE3-NEXT: xorps %xmm1, %xmm1
1467 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1468 ; SSE3-NEXT: movaps %xmm1, %xmm0
1471 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1473 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1474 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1475 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1478 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1480 ; SSE41-NEXT: xorps %xmm1, %xmm1
1481 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1484 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1486 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1487 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1489 %v = insertelement <4 x float> undef, float %a, i32 0
1490 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1491 ret <4 x float> %shuffle
1494 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1495 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1497 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1500 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1502 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1504 %a = load float* %ptr
1505 %v = insertelement <4 x float> undef, float %a, i32 0
1506 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1507 ret <4 x float> %shuffle
1510 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1511 ; SSE2-LABEL: insert_reg_lo_v4i32:
1513 ; SSE2-NEXT: movd %rdi, %xmm1
1514 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1517 ; SSE3-LABEL: insert_reg_lo_v4i32:
1519 ; SSE3-NEXT: movd %rdi, %xmm1
1520 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1523 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1525 ; SSSE3-NEXT: movd %rdi, %xmm1
1526 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1529 ; SSE41-LABEL: insert_reg_lo_v4i32:
1531 ; SSE41-NEXT: movd %rdi, %xmm1
1532 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1535 ; AVX1-LABEL: insert_reg_lo_v4i32:
1537 ; AVX1-NEXT: vmovq %rdi, %xmm1
1538 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1541 ; AVX2-LABEL: insert_reg_lo_v4i32:
1543 ; AVX2-NEXT: vmovq %rdi, %xmm1
1544 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1546 %a.cast = bitcast i64 %a to <2 x i32>
1547 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1548 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1549 ret <4 x i32> %shuffle
1552 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1553 ; SSE2-LABEL: insert_mem_lo_v4i32:
1555 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1558 ; SSE3-LABEL: insert_mem_lo_v4i32:
1560 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1563 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1565 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1568 ; SSE41-LABEL: insert_mem_lo_v4i32:
1570 ; SSE41-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1571 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1574 ; AVX1-LABEL: insert_mem_lo_v4i32:
1576 ; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1577 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1580 ; AVX2-LABEL: insert_mem_lo_v4i32:
1582 ; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1583 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1585 %a = load <2 x i32>* %ptr
1586 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1587 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1588 ret <4 x i32> %shuffle
1591 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1592 ; SSE-LABEL: insert_reg_hi_v4i32:
1594 ; SSE-NEXT: movd %rdi, %xmm1
1595 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1598 ; AVX-LABEL: insert_reg_hi_v4i32:
1600 ; AVX-NEXT: vmovq %rdi, %xmm1
1601 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1603 %a.cast = bitcast i64 %a to <2 x i32>
1604 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1605 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1606 ret <4 x i32> %shuffle
1609 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1610 ; SSE-LABEL: insert_mem_hi_v4i32:
1612 ; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1613 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1616 ; AVX-LABEL: insert_mem_hi_v4i32:
1618 ; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1619 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1621 %a = load <2 x i32>* %ptr
1622 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1623 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1624 ret <4 x i32> %shuffle
1627 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1628 ; SSE-LABEL: insert_reg_lo_v4f32:
1630 ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
1631 ; SSE-NEXT: movapd %xmm1, %xmm0
1634 ; AVX-LABEL: insert_reg_lo_v4f32:
1636 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
1638 %a.cast = bitcast double %a to <2 x float>
1639 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1640 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1641 ret <4 x float> %shuffle
1644 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1645 ; SSE-LABEL: insert_mem_lo_v4f32:
1647 ; SSE-NEXT: movlpd (%rdi), %xmm0
1650 ; AVX-LABEL: insert_mem_lo_v4f32:
1652 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1654 %a = load <2 x float>* %ptr
1655 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1656 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1657 ret <4 x float> %shuffle
1660 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1661 ; SSE-LABEL: insert_reg_hi_v4f32:
1663 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1664 ; SSE-NEXT: movapd %xmm1, %xmm0
1667 ; AVX-LABEL: insert_reg_hi_v4f32:
1669 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1671 %a.cast = bitcast double %a to <2 x float>
1672 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1673 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1674 ret <4 x float> %shuffle
1677 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1678 ; SSE-LABEL: insert_mem_hi_v4f32:
1680 ; SSE-NEXT: movhpd (%rdi), %xmm0
1683 ; AVX-LABEL: insert_mem_hi_v4f32:
1685 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1687 %a = load <2 x float>* %ptr
1688 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1689 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1690 ret <4 x float> %shuffle
1693 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1694 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1696 ; SSE-NEXT: movaps (%rdi), %xmm0
1697 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1700 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1702 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1704 %a = load <4 x float>* %ptr
1705 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1706 ret <4 x float> %shuffle
1710 ; Shuffle to logical bit shifts
1713 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
1714 ; SSE-LABEL: shuffle_v4i32_z0zX:
1716 ; SSE-NEXT: psllq $32, %xmm0
1719 ; AVX-LABEL: shuffle_v4i32_z0zX:
1721 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
1723 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
1724 ret <4 x i32> %shuffle
1727 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
1728 ; SSE-LABEL: shuffle_v4i32_1z3z:
1730 ; SSE-NEXT: psrlq $32, %xmm0
1733 ; AVX-LABEL: shuffle_v4i32_1z3z:
1735 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
1737 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
1738 ret <4 x i32> %shuffle