1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE2-LABEL: shuffle_v4f32_4zzz:
443 ; SSE2-NEXT: xorps %xmm1, %xmm1
444 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
445 ; SSE2-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-LABEL: shuffle_v4f32_4zzz:
450 ; SSE3-NEXT: xorps %xmm1, %xmm1
451 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
452 ; SSE3-NEXT: movaps %xmm1, %xmm0
455 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
457 ; SSSE3-NEXT: xorps %xmm1, %xmm1
458 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
459 ; SSSE3-NEXT: movaps %xmm1, %xmm0
462 ; SSE41-LABEL: shuffle_v4f32_4zzz:
464 ; SSE41-NEXT: xorps %xmm1, %xmm1
465 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
468 ; AVX-LABEL: shuffle_v4f32_4zzz:
470 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
471 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
473 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
474 ret <4 x float> %shuffle
477 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
478 ; SSE2-LABEL: shuffle_v4f32_z4zz:
480 ; SSE2-NEXT: xorps %xmm1, %xmm1
481 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
482 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
485 ; SSE3-LABEL: shuffle_v4f32_z4zz:
487 ; SSE3-NEXT: xorps %xmm1, %xmm1
488 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
489 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
492 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
494 ; SSSE3-NEXT: xorps %xmm1, %xmm1
495 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
496 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
499 ; SSE41-LABEL: shuffle_v4f32_z4zz:
501 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
504 ; AVX-LABEL: shuffle_v4f32_z4zz:
506 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
508 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
509 ret <4 x float> %shuffle
512 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
513 ; SSE2-LABEL: shuffle_v4f32_zz4z:
515 ; SSE2-NEXT: xorps %xmm1, %xmm1
516 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
517 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
518 ; SSE2-NEXT: movaps %xmm1, %xmm0
521 ; SSE3-LABEL: shuffle_v4f32_zz4z:
523 ; SSE3-NEXT: xorps %xmm1, %xmm1
524 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
525 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
526 ; SSE3-NEXT: movaps %xmm1, %xmm0
529 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
531 ; SSSE3-NEXT: xorps %xmm1, %xmm1
532 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
533 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
534 ; SSSE3-NEXT: movaps %xmm1, %xmm0
537 ; SSE41-LABEL: shuffle_v4f32_zz4z:
539 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
542 ; AVX-LABEL: shuffle_v4f32_zz4z:
544 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
546 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
547 ret <4 x float> %shuffle
550 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
551 ; SSE2-LABEL: shuffle_v4f32_zuu4:
553 ; SSE2-NEXT: xorps %xmm1, %xmm1
554 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
555 ; SSE2-NEXT: movaps %xmm1, %xmm0
558 ; SSE3-LABEL: shuffle_v4f32_zuu4:
560 ; SSE3-NEXT: xorps %xmm1, %xmm1
561 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
562 ; SSE3-NEXT: movaps %xmm1, %xmm0
565 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
567 ; SSSE3-NEXT: xorps %xmm1, %xmm1
568 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
569 ; SSSE3-NEXT: movaps %xmm1, %xmm0
572 ; SSE41-LABEL: shuffle_v4f32_zuu4:
574 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
577 ; AVX-LABEL: shuffle_v4f32_zuu4:
579 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
581 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
582 ret <4 x float> %shuffle
585 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
586 ; SSE2-LABEL: shuffle_v4f32_zzz7:
588 ; SSE2-NEXT: xorps %xmm1, %xmm1
589 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
590 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
591 ; SSE2-NEXT: movaps %xmm1, %xmm0
594 ; SSE3-LABEL: shuffle_v4f32_zzz7:
596 ; SSE3-NEXT: xorps %xmm1, %xmm1
597 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
598 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
599 ; SSE3-NEXT: movaps %xmm1, %xmm0
602 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
604 ; SSSE3-NEXT: xorps %xmm1, %xmm1
605 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
606 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
607 ; SSSE3-NEXT: movaps %xmm1, %xmm0
610 ; SSE41-LABEL: shuffle_v4f32_zzz7:
612 ; SSE41-NEXT: xorps %xmm1, %xmm1
613 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
616 ; AVX-LABEL: shuffle_v4f32_zzz7:
618 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
619 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
621 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
622 ret <4 x float> %shuffle
625 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
626 ; SSE2-LABEL: shuffle_v4f32_z6zz:
628 ; SSE2-NEXT: xorps %xmm1, %xmm1
629 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
630 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
633 ; SSE3-LABEL: shuffle_v4f32_z6zz:
635 ; SSE3-NEXT: xorps %xmm1, %xmm1
636 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
637 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
640 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
642 ; SSSE3-NEXT: xorps %xmm1, %xmm1
643 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
644 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
647 ; SSE41-LABEL: shuffle_v4f32_z6zz:
649 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
652 ; AVX-LABEL: shuffle_v4f32_z6zz:
654 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
656 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
657 ret <4 x float> %shuffle
660 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
661 ; SSE2-LABEL: shuffle_v4i32_4zzz:
663 ; SSE2-NEXT: xorps %xmm1, %xmm1
664 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
665 ; SSE2-NEXT: movaps %xmm1, %xmm0
668 ; SSE3-LABEL: shuffle_v4i32_4zzz:
670 ; SSE3-NEXT: xorps %xmm1, %xmm1
671 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
672 ; SSE3-NEXT: movaps %xmm1, %xmm0
675 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
677 ; SSSE3-NEXT: xorps %xmm1, %xmm1
678 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
679 ; SSSE3-NEXT: movaps %xmm1, %xmm0
682 ; SSE41-LABEL: shuffle_v4i32_4zzz:
684 ; SSE41-NEXT: pxor %xmm1, %xmm1
685 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
688 ; AVX-LABEL: shuffle_v4i32_4zzz:
690 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
691 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
693 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
694 ret <4 x i32> %shuffle
697 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
698 ; SSE2-LABEL: shuffle_v4i32_z4zz:
700 ; SSE2-NEXT: xorps %xmm1, %xmm1
701 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
702 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
705 ; SSE3-LABEL: shuffle_v4i32_z4zz:
707 ; SSE3-NEXT: xorps %xmm1, %xmm1
708 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
709 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
712 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
714 ; SSSE3-NEXT: xorps %xmm1, %xmm1
715 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
716 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
719 ; SSE41-LABEL: shuffle_v4i32_z4zz:
721 ; SSE41-NEXT: pxor %xmm1, %xmm1
722 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
723 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
726 ; AVX-LABEL: shuffle_v4i32_z4zz:
728 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
729 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
730 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
732 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
733 ret <4 x i32> %shuffle
736 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
737 ; SSE2-LABEL: shuffle_v4i32_zz4z:
739 ; SSE2-NEXT: xorps %xmm1, %xmm1
740 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
741 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
744 ; SSE3-LABEL: shuffle_v4i32_zz4z:
746 ; SSE3-NEXT: xorps %xmm1, %xmm1
747 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
748 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
751 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
753 ; SSSE3-NEXT: xorps %xmm1, %xmm1
754 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
755 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
758 ; SSE41-LABEL: shuffle_v4i32_zz4z:
760 ; SSE41-NEXT: pxor %xmm1, %xmm1
761 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
762 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
765 ; AVX-LABEL: shuffle_v4i32_zz4z:
767 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
768 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
769 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
771 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
772 ret <4 x i32> %shuffle
775 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
776 ; SSE-LABEL: shuffle_v4i32_zuu4:
778 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
781 ; AVX-LABEL: shuffle_v4i32_zuu4:
783 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
785 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
786 ret <4 x i32> %shuffle
789 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
790 ; SSE2-LABEL: shuffle_v4i32_z6zz:
792 ; SSE2-NEXT: xorps %xmm1, %xmm1
793 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
794 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
797 ; SSE3-LABEL: shuffle_v4i32_z6zz:
799 ; SSE3-NEXT: xorps %xmm1, %xmm1
800 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
801 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
804 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
806 ; SSSE3-NEXT: xorps %xmm1, %xmm1
807 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
808 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
811 ; SSE41-LABEL: shuffle_v4i32_z6zz:
813 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
816 ; AVX-LABEL: shuffle_v4i32_z6zz:
818 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
820 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
821 ret <4 x i32> %shuffle
824 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
825 ; SSE2-LABEL: shuffle_v4i32_7012:
827 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
828 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
829 ; SSE2-NEXT: movaps %xmm1, %xmm0
832 ; SSE3-LABEL: shuffle_v4i32_7012:
834 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
835 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
836 ; SSE3-NEXT: movaps %xmm1, %xmm0
839 ; SSSE3-LABEL: shuffle_v4i32_7012:
841 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
844 ; SSE41-LABEL: shuffle_v4i32_7012:
846 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
849 ; AVX-LABEL: shuffle_v4i32_7012:
851 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
853 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
854 ret <4 x i32> %shuffle
857 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
858 ; SSE2-LABEL: shuffle_v4i32_6701:
860 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
861 ; SSE2-NEXT: movapd %xmm1, %xmm0
864 ; SSE3-LABEL: shuffle_v4i32_6701:
866 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
867 ; SSE3-NEXT: movapd %xmm1, %xmm0
870 ; SSSE3-LABEL: shuffle_v4i32_6701:
872 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
875 ; SSE41-LABEL: shuffle_v4i32_6701:
877 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
880 ; AVX-LABEL: shuffle_v4i32_6701:
882 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
884 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
885 ret <4 x i32> %shuffle
888 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
889 ; SSE2-LABEL: shuffle_v4i32_5670:
891 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
892 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
893 ; SSE2-NEXT: movaps %xmm1, %xmm0
896 ; SSE3-LABEL: shuffle_v4i32_5670:
898 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
899 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
900 ; SSE3-NEXT: movaps %xmm1, %xmm0
903 ; SSSE3-LABEL: shuffle_v4i32_5670:
905 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
908 ; SSE41-LABEL: shuffle_v4i32_5670:
910 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
913 ; AVX-LABEL: shuffle_v4i32_5670:
915 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
917 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
918 ret <4 x i32> %shuffle
921 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
922 ; SSE2-LABEL: shuffle_v4i32_1234:
924 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
925 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
928 ; SSE3-LABEL: shuffle_v4i32_1234:
930 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
931 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
934 ; SSSE3-LABEL: shuffle_v4i32_1234:
936 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
937 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
940 ; SSE41-LABEL: shuffle_v4i32_1234:
942 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
943 ; SSE41-NEXT: movdqa %xmm1, %xmm0
946 ; AVX-LABEL: shuffle_v4i32_1234:
948 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
950 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
951 ret <4 x i32> %shuffle
954 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
955 ; SSE2-LABEL: shuffle_v4i32_2345:
957 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
960 ; SSE3-LABEL: shuffle_v4i32_2345:
962 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
965 ; SSSE3-LABEL: shuffle_v4i32_2345:
967 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
968 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
971 ; SSE41-LABEL: shuffle_v4i32_2345:
973 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
974 ; SSE41-NEXT: movdqa %xmm1, %xmm0
977 ; AVX-LABEL: shuffle_v4i32_2345:
979 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
981 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
982 ret <4 x i32> %shuffle
985 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
986 ; SSE2-LABEL: shuffle_v4i32_3456:
988 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
989 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
992 ; SSE3-LABEL: shuffle_v4i32_3456:
994 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
995 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
998 ; SSSE3-LABEL: shuffle_v4i32_3456:
1000 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1001 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1004 ; SSE41-LABEL: shuffle_v4i32_3456:
1006 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1007 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1010 ; AVX-LABEL: shuffle_v4i32_3456:
1012 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1014 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1015 ret <4 x i32> %shuffle
1018 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1019 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1021 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1024 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1026 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1029 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1031 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1034 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1036 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1039 ; AVX-LABEL: shuffle_v4i32_0u1u:
1041 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1043 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1044 ret <4 x i32> %shuffle
1047 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1048 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1050 ; SSE2-NEXT: pxor %xmm1, %xmm1
1051 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1054 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1056 ; SSE3-NEXT: pxor %xmm1, %xmm1
1057 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1060 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1062 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1063 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1066 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1068 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1071 ; AVX-LABEL: shuffle_v4i32_0z1z:
1073 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1075 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1076 ret <4 x i32> %shuffle
1079 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1080 ; SSE-LABEL: shuffle_v4i32_01zu:
1082 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1085 ; AVX-LABEL: shuffle_v4i32_01zu:
1087 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1089 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1090 ret <4 x i32> %shuffle
1093 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1094 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1096 ; SSE-NEXT: movd %edi, %xmm0
1099 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1101 ; AVX-NEXT: vmovd %edi, %xmm0
1103 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1104 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1105 ret <4 x i32> %shuffle
1108 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1109 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1111 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1114 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1116 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1119 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1120 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1121 ret <4 x i32> %shuffle
1124 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1125 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1127 ; SSE2-NEXT: xorps %xmm1, %xmm1
1128 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1129 ; SSE2-NEXT: movaps %xmm1, %xmm0
1132 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1134 ; SSE3-NEXT: xorps %xmm1, %xmm1
1135 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1136 ; SSE3-NEXT: movaps %xmm1, %xmm0
1139 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1141 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1142 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1143 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1146 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1148 ; SSE41-NEXT: xorps %xmm1, %xmm1
1149 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1152 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1154 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1155 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1157 %v = insertelement <4 x float> undef, float %a, i32 0
1158 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1159 ret <4 x float> %shuffle
1162 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1163 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1165 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1168 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1170 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1172 %a = load float* %ptr
1173 %v = insertelement <4 x float> undef, float %a, i32 0
1174 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1175 ret <4 x float> %shuffle
1178 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1179 ; SSE2-LABEL: insert_reg_lo_v4i32:
1181 ; SSE2-NEXT: movd %rdi, %xmm1
1182 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1185 ; SSE3-LABEL: insert_reg_lo_v4i32:
1187 ; SSE3-NEXT: movd %rdi, %xmm1
1188 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1191 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1193 ; SSSE3-NEXT: movd %rdi, %xmm1
1194 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1197 ; SSE41-LABEL: insert_reg_lo_v4i32:
1199 ; SSE41-NEXT: movd %rdi, %xmm1
1200 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1203 ; AVX1-LABEL: insert_reg_lo_v4i32:
1205 ; AVX1-NEXT: vmovq %rdi, %xmm1
1206 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1209 ; AVX2-LABEL: insert_reg_lo_v4i32:
1211 ; AVX2-NEXT: vmovq %rdi, %xmm1
1212 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1214 %a.cast = bitcast i64 %a to <2 x i32>
1215 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1216 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1217 ret <4 x i32> %shuffle
1220 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1221 ; SSE2-LABEL: insert_mem_lo_v4i32:
1223 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1226 ; SSE3-LABEL: insert_mem_lo_v4i32:
1228 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1231 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1233 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1236 ; SSE41-LABEL: insert_mem_lo_v4i32:
1238 ; SSE41-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1239 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1242 ; AVX1-LABEL: insert_mem_lo_v4i32:
1244 ; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1245 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1248 ; AVX2-LABEL: insert_mem_lo_v4i32:
1250 ; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1251 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1253 %a = load <2 x i32>* %ptr
1254 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1255 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1256 ret <4 x i32> %shuffle
1259 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1260 ; SSE-LABEL: insert_reg_hi_v4i32:
1262 ; SSE-NEXT: movd %rdi, %xmm1
1263 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1266 ; AVX-LABEL: insert_reg_hi_v4i32:
1268 ; AVX-NEXT: vmovq %rdi, %xmm1
1269 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1271 %a.cast = bitcast i64 %a to <2 x i32>
1272 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1273 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1274 ret <4 x i32> %shuffle
1277 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1278 ; SSE-LABEL: insert_mem_hi_v4i32:
1280 ; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1281 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1284 ; AVX-LABEL: insert_mem_hi_v4i32:
1286 ; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1287 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1289 %a = load <2 x i32>* %ptr
1290 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1291 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1292 ret <4 x i32> %shuffle
1295 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1296 ; SSE-LABEL: insert_reg_lo_v4f32:
1298 ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
1299 ; SSE-NEXT: movaps %xmm1, %xmm0
1302 ; AVX-LABEL: insert_reg_lo_v4f32:
1304 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
1306 %a.cast = bitcast double %a to <2 x float>
1307 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1308 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1309 ret <4 x float> %shuffle
1312 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1313 ; SSE-LABEL: insert_mem_lo_v4f32:
1315 ; SSE-NEXT: movlpd (%rdi), %xmm0
1318 ; AVX-LABEL: insert_mem_lo_v4f32:
1320 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1322 %a = load <2 x float>* %ptr
1323 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1324 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1325 ret <4 x float> %shuffle
1328 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1329 ; SSE-LABEL: insert_reg_hi_v4f32:
1331 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1332 ; SSE-NEXT: movapd %xmm1, %xmm0
1335 ; AVX-LABEL: insert_reg_hi_v4f32:
1337 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1339 %a.cast = bitcast double %a to <2 x float>
1340 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1341 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1342 ret <4 x float> %shuffle
1345 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1346 ; SSE-LABEL: insert_mem_hi_v4f32:
1348 ; SSE-NEXT: movhpd (%rdi), %xmm0
1351 ; AVX-LABEL: insert_mem_hi_v4f32:
1353 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1355 %a = load <2 x float>* %ptr
1356 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1357 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1358 ret <4 x float> %shuffle
1361 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1362 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1364 ; SSE-NEXT: movaps (%rdi), %xmm0
1365 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1368 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1370 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1372 %a = load <4 x float>* %ptr
1373 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1374 ret <4 x float> %shuffle
1378 ; Shuffle to logical bit shifts
1381 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
1382 ; SSE-LABEL: shuffle_v4i32_z0zX:
1384 ; SSE-NEXT: psllq $32, %xmm0
1387 ; AVX-LABEL: shuffle_v4i32_z0zX:
1389 ; AVX-NEXT: vpsllq $32, %xmm0
1391 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
1392 ret <4 x i32> %shuffle
1395 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
1396 ; SSE-LABEL: shuffle_v4i32_1z3z:
1398 ; SSE-NEXT: psrlq $32, %xmm0
1401 ; AVX-LABEL: shuffle_v4i32_1z3z:
1403 ; AVX-NEXT: vpsrlq $32, %xmm0
1405 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
1406 ret <4 x i32> %shuffle