1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE-LABEL: shuffle_v4f32_4zzz:
443 ; SSE-NEXT: xorps %xmm1, %xmm1
444 ; SSE-NEXT: movss %xmm0, %xmm1
445 ; SSE-NEXT: movaps %xmm1, %xmm0
448 ; AVX-LABEL: shuffle_v4f32_4zzz:
450 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
451 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
453 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
454 ret <4 x float> %shuffle
457 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
458 ; SSE2-LABEL: shuffle_v4f32_z4zz:
460 ; SSE2-NEXT: xorps %xmm1, %xmm1
461 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
462 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
465 ; SSE3-LABEL: shuffle_v4f32_z4zz:
467 ; SSE3-NEXT: xorps %xmm1, %xmm1
468 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
469 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
472 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
474 ; SSSE3-NEXT: xorps %xmm1, %xmm1
475 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
476 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
479 ; SSE41-LABEL: shuffle_v4f32_z4zz:
481 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
484 ; AVX-LABEL: shuffle_v4f32_z4zz:
486 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
488 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
489 ret <4 x float> %shuffle
492 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
493 ; SSE2-LABEL: shuffle_v4f32_zz4z:
495 ; SSE2-NEXT: xorps %xmm1, %xmm1
496 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
497 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
498 ; SSE2-NEXT: movaps %xmm1, %xmm0
501 ; SSE3-LABEL: shuffle_v4f32_zz4z:
503 ; SSE3-NEXT: xorps %xmm1, %xmm1
504 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
505 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
506 ; SSE3-NEXT: movaps %xmm1, %xmm0
509 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
511 ; SSSE3-NEXT: xorps %xmm1, %xmm1
512 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
513 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
514 ; SSSE3-NEXT: movaps %xmm1, %xmm0
517 ; SSE41-LABEL: shuffle_v4f32_zz4z:
519 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
522 ; AVX-LABEL: shuffle_v4f32_zz4z:
524 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
526 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
527 ret <4 x float> %shuffle
530 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
531 ; SSE2-LABEL: shuffle_v4f32_zuu4:
533 ; SSE2-NEXT: xorps %xmm1, %xmm1
534 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
535 ; SSE2-NEXT: movaps %xmm1, %xmm0
538 ; SSE3-LABEL: shuffle_v4f32_zuu4:
540 ; SSE3-NEXT: xorps %xmm1, %xmm1
541 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
542 ; SSE3-NEXT: movaps %xmm1, %xmm0
545 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
547 ; SSSE3-NEXT: xorps %xmm1, %xmm1
548 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
549 ; SSSE3-NEXT: movaps %xmm1, %xmm0
552 ; SSE41-LABEL: shuffle_v4f32_zuu4:
554 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
557 ; AVX-LABEL: shuffle_v4f32_zuu4:
559 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
561 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
562 ret <4 x float> %shuffle
565 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
566 ; SSE2-LABEL: shuffle_v4f32_zzz7:
568 ; SSE2-NEXT: xorps %xmm1, %xmm1
569 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
570 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
571 ; SSE2-NEXT: movaps %xmm1, %xmm0
574 ; SSE3-LABEL: shuffle_v4f32_zzz7:
576 ; SSE3-NEXT: xorps %xmm1, %xmm1
577 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
578 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
579 ; SSE3-NEXT: movaps %xmm1, %xmm0
582 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
584 ; SSSE3-NEXT: xorps %xmm1, %xmm1
585 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
586 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
587 ; SSSE3-NEXT: movaps %xmm1, %xmm0
590 ; SSE41-LABEL: shuffle_v4f32_zzz7:
592 ; SSE41-NEXT: xorps %xmm1, %xmm1
593 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[3]
594 ; SSE41-NEXT: movaps %xmm1, %xmm0
597 ; AVX-LABEL: shuffle_v4f32_zzz7:
599 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
600 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
602 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
603 ret <4 x float> %shuffle
606 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
607 ; SSE2-LABEL: shuffle_v4f32_z6zz:
609 ; SSE2-NEXT: xorps %xmm1, %xmm1
610 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
611 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
614 ; SSE3-LABEL: shuffle_v4f32_z6zz:
616 ; SSE3-NEXT: xorps %xmm1, %xmm1
617 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
618 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
621 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
623 ; SSSE3-NEXT: xorps %xmm1, %xmm1
624 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
625 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
628 ; SSE41-LABEL: shuffle_v4f32_z6zz:
630 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
633 ; AVX-LABEL: shuffle_v4f32_z6zz:
635 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
637 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
638 ret <4 x float> %shuffle
641 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
642 ; SSE-LABEL: shuffle_v4i32_4zzz:
644 ; SSE-NEXT: xorps %xmm1, %xmm1
645 ; SSE-NEXT: movss %xmm0, %xmm1
646 ; SSE-NEXT: movaps %xmm1, %xmm0
649 ; AVX-LABEL: shuffle_v4i32_4zzz:
651 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
652 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
654 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
655 ret <4 x i32> %shuffle
658 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
659 ; SSE-LABEL: shuffle_v4i32_z4zz:
661 ; SSE-NEXT: xorps %xmm1, %xmm1
662 ; SSE-NEXT: movss %xmm0, %xmm1
663 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
666 ; AVX-LABEL: shuffle_v4i32_z4zz:
668 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
669 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
670 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
672 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
673 ret <4 x i32> %shuffle
676 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
677 ; SSE-LABEL: shuffle_v4i32_zz4z:
679 ; SSE-NEXT: xorps %xmm1, %xmm1
680 ; SSE-NEXT: movss %xmm0, %xmm1
681 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
684 ; AVX-LABEL: shuffle_v4i32_zz4z:
686 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
687 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
688 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
690 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
691 ret <4 x i32> %shuffle
694 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
695 ; SSE-LABEL: shuffle_v4i32_zuu4:
697 ; SSE-NEXT: xorps %xmm1, %xmm1
698 ; SSE-NEXT: movss %xmm0, %xmm1
699 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
702 ; AVX-LABEL: shuffle_v4i32_zuu4:
704 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
705 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
706 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,0]
708 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
709 ret <4 x i32> %shuffle
712 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
713 ; SSE2-LABEL: shuffle_v4i32_z6zz:
715 ; SSE2-NEXT: xorps %xmm1, %xmm1
716 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
717 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
720 ; SSE3-LABEL: shuffle_v4i32_z6zz:
722 ; SSE3-NEXT: xorps %xmm1, %xmm1
723 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
724 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
727 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
729 ; SSSE3-NEXT: xorps %xmm1, %xmm1
730 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
731 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
734 ; SSE41-LABEL: shuffle_v4i32_z6zz:
736 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
739 ; AVX-LABEL: shuffle_v4i32_z6zz:
741 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
743 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
744 ret <4 x i32> %shuffle
747 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
748 ; SSE2-LABEL: shuffle_v4i32_7012:
750 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
751 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
752 ; SSE2-NEXT: movaps %xmm1, %xmm0
755 ; SSE3-LABEL: shuffle_v4i32_7012:
757 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
758 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
759 ; SSE3-NEXT: movaps %xmm1, %xmm0
762 ; SSSE3-LABEL: shuffle_v4i32_7012:
764 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
767 ; SSE41-LABEL: shuffle_v4i32_7012:
769 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
772 ; AVX-LABEL: shuffle_v4i32_7012:
774 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
776 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
777 ret <4 x i32> %shuffle
780 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
781 ; SSE2-LABEL: shuffle_v4i32_6701:
783 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
784 ; SSE2-NEXT: movapd %xmm1, %xmm0
787 ; SSE3-LABEL: shuffle_v4i32_6701:
789 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
790 ; SSE3-NEXT: movapd %xmm1, %xmm0
793 ; SSSE3-LABEL: shuffle_v4i32_6701:
795 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
798 ; SSE41-LABEL: shuffle_v4i32_6701:
800 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
803 ; AVX-LABEL: shuffle_v4i32_6701:
805 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
807 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
808 ret <4 x i32> %shuffle
811 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
812 ; SSE2-LABEL: shuffle_v4i32_5670:
814 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
815 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
816 ; SSE2-NEXT: movaps %xmm1, %xmm0
819 ; SSE3-LABEL: shuffle_v4i32_5670:
821 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
822 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
823 ; SSE3-NEXT: movaps %xmm1, %xmm0
826 ; SSSE3-LABEL: shuffle_v4i32_5670:
828 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
831 ; SSE41-LABEL: shuffle_v4i32_5670:
833 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
836 ; AVX-LABEL: shuffle_v4i32_5670:
838 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
840 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
841 ret <4 x i32> %shuffle
844 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
845 ; SSE2-LABEL: shuffle_v4i32_1234:
847 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
848 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
851 ; SSE3-LABEL: shuffle_v4i32_1234:
853 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
854 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
857 ; SSSE3-LABEL: shuffle_v4i32_1234:
859 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
860 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
863 ; SSE41-LABEL: shuffle_v4i32_1234:
865 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
866 ; SSE41-NEXT: movdqa %xmm1, %xmm0
869 ; AVX-LABEL: shuffle_v4i32_1234:
871 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
873 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
874 ret <4 x i32> %shuffle
877 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
878 ; SSE2-LABEL: shuffle_v4i32_2345:
880 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
883 ; SSE3-LABEL: shuffle_v4i32_2345:
885 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
888 ; SSSE3-LABEL: shuffle_v4i32_2345:
890 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
891 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
894 ; SSE41-LABEL: shuffle_v4i32_2345:
896 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
897 ; SSE41-NEXT: movdqa %xmm1, %xmm0
900 ; AVX-LABEL: shuffle_v4i32_2345:
902 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
904 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
905 ret <4 x i32> %shuffle
908 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
909 ; SSE2-LABEL: shuffle_v4i32_3456:
911 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
912 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
915 ; SSE3-LABEL: shuffle_v4i32_3456:
917 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
918 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
921 ; SSSE3-LABEL: shuffle_v4i32_3456:
923 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
924 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
927 ; SSE41-LABEL: shuffle_v4i32_3456:
929 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
930 ; SSE41-NEXT: movdqa %xmm1, %xmm0
933 ; AVX-LABEL: shuffle_v4i32_3456:
935 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
937 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
938 ret <4 x i32> %shuffle
941 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
942 ; SSE2-LABEL: shuffle_v4i32_0u1u:
944 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
947 ; SSE3-LABEL: shuffle_v4i32_0u1u:
949 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
952 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
954 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
957 ; SSE41-LABEL: shuffle_v4i32_0u1u:
959 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
962 ; AVX-LABEL: shuffle_v4i32_0u1u:
964 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
966 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
967 ret <4 x i32> %shuffle
970 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
971 ; SSE2-LABEL: shuffle_v4i32_0z1z:
973 ; SSE2-NEXT: pxor %xmm1, %xmm1
974 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
977 ; SSE3-LABEL: shuffle_v4i32_0z1z:
979 ; SSE3-NEXT: pxor %xmm1, %xmm1
980 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
983 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
985 ; SSSE3-NEXT: pxor %xmm1, %xmm1
986 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
989 ; SSE41-LABEL: shuffle_v4i32_0z1z:
991 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
994 ; AVX-LABEL: shuffle_v4i32_0z1z:
996 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
998 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
999 ret <4 x i32> %shuffle
1002 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1003 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1005 ; SSE-NEXT: movd %edi, %xmm0
1008 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1010 ; AVX-NEXT: vmovd %edi, %xmm0
1012 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1013 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1014 ret <4 x i32> %shuffle
1017 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1018 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1020 ; SSE-NEXT: movd (%rdi), %xmm0
1023 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1025 ; AVX-NEXT: vmovd (%rdi), %xmm0
1028 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1029 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1030 ret <4 x i32> %shuffle
1033 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1034 ; SSE-LABEL: insert_reg_and_zero_v4f32:
1036 ; SSE-NEXT: xorps %xmm1, %xmm1
1037 ; SSE-NEXT: movss %xmm0, %xmm1
1038 ; SSE-NEXT: movaps %xmm1, %xmm0
1041 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1043 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1044 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
1046 %v = insertelement <4 x float> undef, float %a, i32 0
1047 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1048 ret <4 x float> %shuffle
1051 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1052 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1054 ; SSE-NEXT: movss (%rdi), %xmm0
1057 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1059 ; AVX-NEXT: vmovss (%rdi), %xmm0
1061 %a = load float* %ptr
1062 %v = insertelement <4 x float> undef, float %a, i32 0
1063 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1064 ret <4 x float> %shuffle
1067 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1068 ; SSE2-LABEL: insert_reg_lo_v4i32:
1070 ; SSE2-NEXT: movd %rdi, %xmm1
1071 ; SSE2-NEXT: movsd %xmm1, %xmm0
1074 ; SSE3-LABEL: insert_reg_lo_v4i32:
1076 ; SSE3-NEXT: movd %rdi, %xmm1
1077 ; SSE3-NEXT: movsd %xmm1, %xmm0
1080 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1082 ; SSSE3-NEXT: movd %rdi, %xmm1
1083 ; SSSE3-NEXT: movsd %xmm1, %xmm0
1086 ; SSE41-LABEL: insert_reg_lo_v4i32:
1088 ; SSE41-NEXT: movd %rdi, %xmm1
1089 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1090 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1093 ; AVX1-LABEL: insert_reg_lo_v4i32:
1095 ; AVX1-NEXT: vmovq %rdi, %xmm1
1096 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1099 ; AVX2-LABEL: insert_reg_lo_v4i32:
1101 ; AVX2-NEXT: vmovq %rdi, %xmm1
1102 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1104 %a.cast = bitcast i64 %a to <2 x i32>
1105 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1106 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1107 ret <4 x i32> %shuffle
1110 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1111 ; SSE2-LABEL: insert_mem_lo_v4i32:
1113 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1116 ; SSE3-LABEL: insert_mem_lo_v4i32:
1118 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1121 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1123 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1126 ; SSE41-LABEL: insert_mem_lo_v4i32:
1128 ; SSE41-NEXT: movq (%rdi), %xmm1
1129 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1130 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1133 ; AVX1-LABEL: insert_mem_lo_v4i32:
1135 ; AVX1-NEXT: vmovq (%rdi), %xmm1
1136 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1139 ; AVX2-LABEL: insert_mem_lo_v4i32:
1141 ; AVX2-NEXT: vmovq (%rdi), %xmm1
1142 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1144 %a = load <2 x i32>* %ptr
1145 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1146 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1147 ret <4 x i32> %shuffle
1150 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1151 ; SSE-LABEL: insert_reg_hi_v4i32:
1153 ; SSE-NEXT: movd %rdi, %xmm1
1154 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1157 ; AVX-LABEL: insert_reg_hi_v4i32:
1159 ; AVX-NEXT: vmovq %rdi, %xmm1
1160 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1162 %a.cast = bitcast i64 %a to <2 x i32>
1163 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1164 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1165 ret <4 x i32> %shuffle
1168 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1169 ; SSE-LABEL: insert_mem_hi_v4i32:
1171 ; SSE-NEXT: movq (%rdi), %xmm1
1172 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1175 ; AVX-LABEL: insert_mem_hi_v4i32:
1177 ; AVX-NEXT: vmovq (%rdi), %xmm1
1178 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1180 %a = load <2 x i32>* %ptr
1181 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1182 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1183 ret <4 x i32> %shuffle
1186 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1187 ; SSE-LABEL: insert_reg_lo_v4f32:
1189 ; SSE-NEXT: movsd %xmm0, %xmm1
1190 ; SSE-NEXT: movaps %xmm1, %xmm0
1193 ; AVX-LABEL: insert_reg_lo_v4f32:
1195 ; AVX-NEXT: vmovsd %xmm0, %xmm1, %xmm0
1197 %a.cast = bitcast double %a to <2 x float>
1198 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1199 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1200 ret <4 x float> %shuffle
1203 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1204 ; SSE-LABEL: insert_mem_lo_v4f32:
1206 ; SSE-NEXT: movlpd (%rdi), %xmm0
1209 ; AVX-LABEL: insert_mem_lo_v4f32:
1211 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1213 %a = load <2 x float>* %ptr
1214 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1215 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1216 ret <4 x float> %shuffle
1219 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1220 ; SSE-LABEL: insert_reg_hi_v4f32:
1222 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1223 ; SSE-NEXT: movapd %xmm1, %xmm0
1226 ; AVX-LABEL: insert_reg_hi_v4f32:
1228 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1230 %a.cast = bitcast double %a to <2 x float>
1231 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1232 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1233 ret <4 x float> %shuffle
1236 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1237 ; SSE-LABEL: insert_mem_hi_v4f32:
1239 ; SSE-NEXT: movhpd (%rdi), %xmm0
1242 ; AVX-LABEL: insert_mem_hi_v4f32:
1244 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1246 %a = load <2 x float>* %ptr
1247 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1248 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1249 ret <4 x float> %shuffle
1252 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1253 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1255 ; SSE-NEXT: movaps (%rdi), %xmm0
1256 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1259 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1261 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1263 %a = load <4 x float>* %ptr
1264 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1265 ret <4 x float> %shuffle