1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-legality | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
326 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
329 ; AVX1-LABEL: shuffle_v4i32_0124:
331 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
332 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
335 ; AVX2-LABEL: shuffle_v4i32_0124:
337 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
338 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
340 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
341 ret <4 x i32> %shuffle
343 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
344 ; SSE2-LABEL: shuffle_v4i32_0142:
346 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
347 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
350 ; SSE3-LABEL: shuffle_v4i32_0142:
352 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
353 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
356 ; SSSE3-LABEL: shuffle_v4i32_0142:
358 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
359 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
362 ; SSE41-LABEL: shuffle_v4i32_0142:
364 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
365 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
366 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
369 ; AVX1-LABEL: shuffle_v4i32_0142:
371 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
372 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
373 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
376 ; AVX2-LABEL: shuffle_v4i32_0142:
378 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
379 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
380 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
382 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
383 ret <4 x i32> %shuffle
385 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
386 ; SSE2-LABEL: shuffle_v4i32_0412:
388 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
389 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
390 ; SSE2-NEXT: movaps %xmm1, %xmm0
393 ; SSE3-LABEL: shuffle_v4i32_0412:
395 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
396 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
397 ; SSE3-NEXT: movaps %xmm1, %xmm0
400 ; SSSE3-LABEL: shuffle_v4i32_0412:
402 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
403 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
404 ; SSSE3-NEXT: movaps %xmm1, %xmm0
407 ; SSE41-LABEL: shuffle_v4i32_0412:
409 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
410 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
411 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
414 ; AVX1-LABEL: shuffle_v4i32_0412:
416 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
417 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
418 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
421 ; AVX2-LABEL: shuffle_v4i32_0412:
423 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
424 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
425 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
427 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
428 ret <4 x i32> %shuffle
430 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
431 ; SSE2-LABEL: shuffle_v4i32_4012:
433 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
434 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
435 ; SSE2-NEXT: movaps %xmm1, %xmm0
438 ; SSE3-LABEL: shuffle_v4i32_4012:
440 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
441 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
442 ; SSE3-NEXT: movaps %xmm1, %xmm0
445 ; SSSE3-LABEL: shuffle_v4i32_4012:
447 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
448 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
449 ; SSSE3-NEXT: movaps %xmm1, %xmm0
452 ; SSE41-LABEL: shuffle_v4i32_4012:
454 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
455 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
458 ; AVX1-LABEL: shuffle_v4i32_4012:
460 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
461 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
464 ; AVX2-LABEL: shuffle_v4i32_4012:
466 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
467 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
469 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
470 ret <4 x i32> %shuffle
472 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
473 ; SSE-LABEL: shuffle_v4i32_0145:
475 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
478 ; AVX-LABEL: shuffle_v4i32_0145:
480 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
482 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
483 ret <4 x i32> %shuffle
485 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
486 ; SSE2-LABEL: shuffle_v4i32_0451:
488 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
489 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
492 ; SSE3-LABEL: shuffle_v4i32_0451:
494 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
495 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
498 ; SSSE3-LABEL: shuffle_v4i32_0451:
500 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
501 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
504 ; SSE41-LABEL: shuffle_v4i32_0451:
506 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
507 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
508 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
511 ; AVX1-LABEL: shuffle_v4i32_0451:
513 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
514 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
515 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
518 ; AVX2-LABEL: shuffle_v4i32_0451:
520 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
521 ; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
522 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
524 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
525 ret <4 x i32> %shuffle
527 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
528 ; SSE-LABEL: shuffle_v4i32_4501:
530 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
531 ; SSE-NEXT: movdqa %xmm1, %xmm0
534 ; AVX-LABEL: shuffle_v4i32_4501:
536 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
538 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
539 ret <4 x i32> %shuffle
541 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
542 ; SSE2-LABEL: shuffle_v4i32_4015:
544 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
545 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
548 ; SSE3-LABEL: shuffle_v4i32_4015:
550 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
551 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
554 ; SSSE3-LABEL: shuffle_v4i32_4015:
556 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
557 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
560 ; SSE41-LABEL: shuffle_v4i32_4015:
562 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
563 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
564 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
567 ; AVX1-LABEL: shuffle_v4i32_4015:
569 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
570 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
571 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
574 ; AVX2-LABEL: shuffle_v4i32_4015:
576 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
577 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
578 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
580 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
581 ret <4 x i32> %shuffle
584 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
585 ; SSE2-LABEL: shuffle_v4f32_4zzz:
587 ; SSE2-NEXT: xorps %xmm1, %xmm1
588 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
589 ; SSE2-NEXT: movaps %xmm1, %xmm0
592 ; SSE3-LABEL: shuffle_v4f32_4zzz:
594 ; SSE3-NEXT: xorps %xmm1, %xmm1
595 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
596 ; SSE3-NEXT: movaps %xmm1, %xmm0
599 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
601 ; SSSE3-NEXT: xorps %xmm1, %xmm1
602 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
603 ; SSSE3-NEXT: movaps %xmm1, %xmm0
606 ; SSE41-LABEL: shuffle_v4f32_4zzz:
608 ; SSE41-NEXT: xorps %xmm1, %xmm1
609 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
612 ; AVX-LABEL: shuffle_v4f32_4zzz:
614 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
615 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
617 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
618 ret <4 x float> %shuffle
621 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
622 ; SSE2-LABEL: shuffle_v4f32_z4zz:
624 ; SSE2-NEXT: xorps %xmm1, %xmm1
625 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
626 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
629 ; SSE3-LABEL: shuffle_v4f32_z4zz:
631 ; SSE3-NEXT: xorps %xmm1, %xmm1
632 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
633 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
636 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
638 ; SSSE3-NEXT: xorps %xmm1, %xmm1
639 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
640 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
643 ; SSE41-LABEL: shuffle_v4f32_z4zz:
645 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
648 ; AVX-LABEL: shuffle_v4f32_z4zz:
650 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
652 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
653 ret <4 x float> %shuffle
656 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
657 ; SSE2-LABEL: shuffle_v4f32_zz4z:
659 ; SSE2-NEXT: xorps %xmm1, %xmm1
660 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
661 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
662 ; SSE2-NEXT: movaps %xmm1, %xmm0
665 ; SSE3-LABEL: shuffle_v4f32_zz4z:
667 ; SSE3-NEXT: xorps %xmm1, %xmm1
668 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
669 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
670 ; SSE3-NEXT: movaps %xmm1, %xmm0
673 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
675 ; SSSE3-NEXT: xorps %xmm1, %xmm1
676 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
677 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
678 ; SSSE3-NEXT: movaps %xmm1, %xmm0
681 ; SSE41-LABEL: shuffle_v4f32_zz4z:
683 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
686 ; AVX-LABEL: shuffle_v4f32_zz4z:
688 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
690 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
691 ret <4 x float> %shuffle
694 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
695 ; SSE2-LABEL: shuffle_v4f32_zuu4:
697 ; SSE2-NEXT: xorps %xmm1, %xmm1
698 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
699 ; SSE2-NEXT: movaps %xmm1, %xmm0
702 ; SSE3-LABEL: shuffle_v4f32_zuu4:
704 ; SSE3-NEXT: xorps %xmm1, %xmm1
705 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
706 ; SSE3-NEXT: movaps %xmm1, %xmm0
709 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
711 ; SSSE3-NEXT: xorps %xmm1, %xmm1
712 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
713 ; SSSE3-NEXT: movaps %xmm1, %xmm0
716 ; SSE41-LABEL: shuffle_v4f32_zuu4:
718 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
721 ; AVX-LABEL: shuffle_v4f32_zuu4:
723 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
725 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
726 ret <4 x float> %shuffle
729 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
730 ; SSE2-LABEL: shuffle_v4f32_zzz7:
732 ; SSE2-NEXT: xorps %xmm1, %xmm1
733 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
734 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
735 ; SSE2-NEXT: movaps %xmm1, %xmm0
738 ; SSE3-LABEL: shuffle_v4f32_zzz7:
740 ; SSE3-NEXT: xorps %xmm1, %xmm1
741 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
742 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
743 ; SSE3-NEXT: movaps %xmm1, %xmm0
746 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
748 ; SSSE3-NEXT: xorps %xmm1, %xmm1
749 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
750 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
751 ; SSSE3-NEXT: movaps %xmm1, %xmm0
754 ; SSE41-LABEL: shuffle_v4f32_zzz7:
756 ; SSE41-NEXT: xorps %xmm1, %xmm1
757 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
760 ; AVX-LABEL: shuffle_v4f32_zzz7:
762 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
763 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
765 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
766 ret <4 x float> %shuffle
769 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
770 ; SSE2-LABEL: shuffle_v4f32_z6zz:
772 ; SSE2-NEXT: xorps %xmm1, %xmm1
773 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
774 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
777 ; SSE3-LABEL: shuffle_v4f32_z6zz:
779 ; SSE3-NEXT: xorps %xmm1, %xmm1
780 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
781 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
784 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
786 ; SSSE3-NEXT: xorps %xmm1, %xmm1
787 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
788 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
791 ; SSE41-LABEL: shuffle_v4f32_z6zz:
793 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
796 ; AVX-LABEL: shuffle_v4f32_z6zz:
798 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
800 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
801 ret <4 x float> %shuffle
804 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
805 ; SSE2-LABEL: shuffle_v4f32_0z23:
807 ; SSE2-NEXT: xorps %xmm1, %xmm1
808 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
809 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
810 ; SSE2-NEXT: movaps %xmm1, %xmm0
813 ; SSE3-LABEL: shuffle_v4f32_0z23:
815 ; SSE3-NEXT: xorps %xmm1, %xmm1
816 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
817 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
818 ; SSE3-NEXT: movaps %xmm1, %xmm0
821 ; SSSE3-LABEL: shuffle_v4f32_0z23:
823 ; SSSE3-NEXT: xorps %xmm1, %xmm1
824 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
825 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
826 ; SSSE3-NEXT: movaps %xmm1, %xmm0
829 ; SSE41-LABEL: shuffle_v4f32_0z23:
831 ; SSE41-NEXT: xorps %xmm1, %xmm1
832 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
835 ; AVX-LABEL: shuffle_v4f32_0z23:
837 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
838 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
840 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
841 ret <4 x float> %shuffle
844 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
845 ; SSE2-LABEL: shuffle_v4f32_01z3:
847 ; SSE2-NEXT: xorps %xmm1, %xmm1
848 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
849 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
852 ; SSE3-LABEL: shuffle_v4f32_01z3:
854 ; SSE3-NEXT: xorps %xmm1, %xmm1
855 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
856 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
859 ; SSSE3-LABEL: shuffle_v4f32_01z3:
861 ; SSSE3-NEXT: xorps %xmm1, %xmm1
862 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
863 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
866 ; SSE41-LABEL: shuffle_v4f32_01z3:
868 ; SSE41-NEXT: xorps %xmm1, %xmm1
869 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
872 ; AVX-LABEL: shuffle_v4f32_01z3:
874 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
875 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
877 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
878 ret <4 x float> %shuffle
881 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
882 ; SSE2-LABEL: shuffle_v4f32_012z:
884 ; SSE2-NEXT: xorps %xmm1, %xmm1
885 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
886 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
889 ; SSE3-LABEL: shuffle_v4f32_012z:
891 ; SSE3-NEXT: xorps %xmm1, %xmm1
892 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
893 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
896 ; SSSE3-LABEL: shuffle_v4f32_012z:
898 ; SSSE3-NEXT: xorps %xmm1, %xmm1
899 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
900 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
903 ; SSE41-LABEL: shuffle_v4f32_012z:
905 ; SSE41-NEXT: xorps %xmm1, %xmm1
906 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
909 ; AVX-LABEL: shuffle_v4f32_012z:
911 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
912 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
914 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
915 ret <4 x float> %shuffle
918 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
919 ; SSE2-LABEL: shuffle_v4f32_0zz3:
921 ; SSE2-NEXT: xorps %xmm1, %xmm1
922 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
923 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
926 ; SSE3-LABEL: shuffle_v4f32_0zz3:
928 ; SSE3-NEXT: xorps %xmm1, %xmm1
929 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
930 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
933 ; SSSE3-LABEL: shuffle_v4f32_0zz3:
935 ; SSSE3-NEXT: xorps %xmm1, %xmm1
936 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
937 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
940 ; SSE41-LABEL: shuffle_v4f32_0zz3:
942 ; SSE41-NEXT: xorps %xmm1, %xmm1
943 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
946 ; AVX-LABEL: shuffle_v4f32_0zz3:
948 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
949 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
951 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
952 ret <4 x float> %shuffle
955 define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float> %b) {
956 ; SSE-LABEL: shuffle_v4f32_u051:
958 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
959 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
962 ; AVX-LABEL: shuffle_v4f32_u051:
964 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[1,0]
965 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,2]
967 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 undef, i32 0, i32 5, i32 1>
968 ret <4 x float> %shuffle
971 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
972 ; SSE2-LABEL: shuffle_v4i32_4zzz:
974 ; SSE2-NEXT: xorps %xmm1, %xmm1
975 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
976 ; SSE2-NEXT: movaps %xmm1, %xmm0
979 ; SSE3-LABEL: shuffle_v4i32_4zzz:
981 ; SSE3-NEXT: xorps %xmm1, %xmm1
982 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
983 ; SSE3-NEXT: movaps %xmm1, %xmm0
986 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
988 ; SSSE3-NEXT: xorps %xmm1, %xmm1
989 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
990 ; SSSE3-NEXT: movaps %xmm1, %xmm0
993 ; SSE41-LABEL: shuffle_v4i32_4zzz:
995 ; SSE41-NEXT: pxor %xmm1, %xmm1
996 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
999 ; AVX-LABEL: shuffle_v4i32_4zzz:
1001 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1002 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1004 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
1005 ret <4 x i32> %shuffle
1008 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
1009 ; SSE2-LABEL: shuffle_v4i32_z4zz:
1011 ; SSE2-NEXT: xorps %xmm1, %xmm1
1012 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1013 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1016 ; SSE3-LABEL: shuffle_v4i32_z4zz:
1018 ; SSE3-NEXT: xorps %xmm1, %xmm1
1019 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1020 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1023 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
1025 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1026 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1027 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1030 ; SSE41-LABEL: shuffle_v4i32_z4zz:
1032 ; SSE41-NEXT: pxor %xmm1, %xmm1
1033 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1034 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1037 ; AVX-LABEL: shuffle_v4i32_z4zz:
1039 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1040 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1041 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
1043 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
1044 ret <4 x i32> %shuffle
1047 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
1048 ; SSE2-LABEL: shuffle_v4i32_zz4z:
1050 ; SSE2-NEXT: xorps %xmm1, %xmm1
1051 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1052 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1055 ; SSE3-LABEL: shuffle_v4i32_zz4z:
1057 ; SSE3-NEXT: xorps %xmm1, %xmm1
1058 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1059 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1062 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
1064 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1065 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1066 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1069 ; SSE41-LABEL: shuffle_v4i32_zz4z:
1071 ; SSE41-NEXT: pxor %xmm1, %xmm1
1072 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1073 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1076 ; AVX-LABEL: shuffle_v4i32_zz4z:
1078 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1079 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1080 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
1082 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
1083 ret <4 x i32> %shuffle
1086 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
1087 ; SSE-LABEL: shuffle_v4i32_zuu4:
1089 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1092 ; AVX-LABEL: shuffle_v4i32_zuu4:
1094 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1096 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
1097 ret <4 x i32> %shuffle
1100 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
1101 ; SSE2-LABEL: shuffle_v4i32_z6zz:
1103 ; SSE2-NEXT: xorps %xmm1, %xmm1
1104 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1105 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1108 ; SSE3-LABEL: shuffle_v4i32_z6zz:
1110 ; SSE3-NEXT: xorps %xmm1, %xmm1
1111 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1112 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1115 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
1117 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1118 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1119 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1122 ; SSE41-LABEL: shuffle_v4i32_z6zz:
1124 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
1125 ; SSE41-NEXT: pxor %xmm0, %xmm0
1126 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1129 ; AVX1-LABEL: shuffle_v4i32_z6zz:
1131 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
1132 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1133 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5,6,7]
1136 ; AVX2-LABEL: shuffle_v4i32_z6zz:
1138 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
1139 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1140 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1142 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
1143 ret <4 x i32> %shuffle
1146 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
1147 ; SSE2-LABEL: shuffle_v4i32_7012:
1149 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1150 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1151 ; SSE2-NEXT: movaps %xmm1, %xmm0
1154 ; SSE3-LABEL: shuffle_v4i32_7012:
1156 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1157 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1158 ; SSE3-NEXT: movaps %xmm1, %xmm0
1161 ; SSSE3-LABEL: shuffle_v4i32_7012:
1163 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1166 ; SSE41-LABEL: shuffle_v4i32_7012:
1168 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1171 ; AVX-LABEL: shuffle_v4i32_7012:
1173 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1175 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
1176 ret <4 x i32> %shuffle
1179 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
1180 ; SSE2-LABEL: shuffle_v4i32_6701:
1182 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1183 ; SSE2-NEXT: movapd %xmm1, %xmm0
1186 ; SSE3-LABEL: shuffle_v4i32_6701:
1188 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1189 ; SSE3-NEXT: movapd %xmm1, %xmm0
1192 ; SSSE3-LABEL: shuffle_v4i32_6701:
1194 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1197 ; SSE41-LABEL: shuffle_v4i32_6701:
1199 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1202 ; AVX-LABEL: shuffle_v4i32_6701:
1204 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1206 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
1207 ret <4 x i32> %shuffle
1210 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
1211 ; SSE2-LABEL: shuffle_v4i32_5670:
1213 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1214 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1215 ; SSE2-NEXT: movaps %xmm1, %xmm0
1218 ; SSE3-LABEL: shuffle_v4i32_5670:
1220 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1221 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1222 ; SSE3-NEXT: movaps %xmm1, %xmm0
1225 ; SSSE3-LABEL: shuffle_v4i32_5670:
1227 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1230 ; SSE41-LABEL: shuffle_v4i32_5670:
1232 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1235 ; AVX-LABEL: shuffle_v4i32_5670:
1237 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1239 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1240 ret <4 x i32> %shuffle
1243 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1244 ; SSE2-LABEL: shuffle_v4i32_1234:
1246 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1247 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1250 ; SSE3-LABEL: shuffle_v4i32_1234:
1252 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1253 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1256 ; SSSE3-LABEL: shuffle_v4i32_1234:
1258 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1259 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1262 ; SSE41-LABEL: shuffle_v4i32_1234:
1264 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1265 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1268 ; AVX-LABEL: shuffle_v4i32_1234:
1270 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1272 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1273 ret <4 x i32> %shuffle
1276 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1277 ; SSE2-LABEL: shuffle_v4i32_2345:
1279 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1282 ; SSE3-LABEL: shuffle_v4i32_2345:
1284 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1287 ; SSSE3-LABEL: shuffle_v4i32_2345:
1289 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1290 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1293 ; SSE41-LABEL: shuffle_v4i32_2345:
1295 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1296 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1299 ; AVX-LABEL: shuffle_v4i32_2345:
1301 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1303 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1304 ret <4 x i32> %shuffle
1307 define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
1308 ; SSE2-LABEL: shuffle_v4i32_40u1:
1310 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
1311 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[2,1]
1312 ; SSE2-NEXT: movaps %xmm1, %xmm0
1315 ; SSE3-LABEL: shuffle_v4i32_40u1:
1317 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
1318 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[2,1]
1319 ; SSE3-NEXT: movaps %xmm1, %xmm0
1322 ; SSSE3-LABEL: shuffle_v4i32_40u1:
1324 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
1325 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[2,1]
1326 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1329 ; SSE41-LABEL: shuffle_v4i32_40u1:
1331 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
1332 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
1335 ; AVX1-LABEL: shuffle_v4i32_40u1:
1337 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
1338 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
1341 ; AVX2-LABEL: shuffle_v4i32_40u1:
1343 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
1344 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
1346 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
1347 ret <4 x i32> %shuffle
1350 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1351 ; SSE2-LABEL: shuffle_v4i32_3456:
1353 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1354 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1357 ; SSE3-LABEL: shuffle_v4i32_3456:
1359 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1360 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1363 ; SSSE3-LABEL: shuffle_v4i32_3456:
1365 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1366 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1369 ; SSE41-LABEL: shuffle_v4i32_3456:
1371 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1372 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1375 ; AVX-LABEL: shuffle_v4i32_3456:
1377 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1380 ret <4 x i32> %shuffle
1383 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1384 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1386 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1389 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1391 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1394 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1396 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1399 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1401 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1404 ; AVX-LABEL: shuffle_v4i32_0u1u:
1406 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1408 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1409 ret <4 x i32> %shuffle
1412 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1413 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1415 ; SSE2-NEXT: pxor %xmm1, %xmm1
1416 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1419 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1421 ; SSE3-NEXT: pxor %xmm1, %xmm1
1422 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1425 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1427 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1428 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1431 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1433 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1436 ; AVX-LABEL: shuffle_v4i32_0z1z:
1438 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1440 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1441 ret <4 x i32> %shuffle
1444 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1445 ; SSE-LABEL: shuffle_v4i32_01zu:
1447 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1450 ; AVX-LABEL: shuffle_v4i32_01zu:
1452 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1454 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1455 ret <4 x i32> %shuffle
1458 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1459 ; SSE2-LABEL: shuffle_v4i32_0z23:
1461 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1464 ; SSE3-LABEL: shuffle_v4i32_0z23:
1466 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1469 ; SSSE3-LABEL: shuffle_v4i32_0z23:
1471 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1474 ; SSE41-LABEL: shuffle_v4i32_0z23:
1476 ; SSE41-NEXT: pxor %xmm1, %xmm1
1477 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1480 ; AVX1-LABEL: shuffle_v4i32_0z23:
1482 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1483 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1486 ; AVX2-LABEL: shuffle_v4i32_0z23:
1488 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1489 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1491 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1492 ret <4 x i32> %shuffle
1495 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1496 ; SSE2-LABEL: shuffle_v4i32_01z3:
1498 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1501 ; SSE3-LABEL: shuffle_v4i32_01z3:
1503 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1506 ; SSSE3-LABEL: shuffle_v4i32_01z3:
1508 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1511 ; SSE41-LABEL: shuffle_v4i32_01z3:
1513 ; SSE41-NEXT: pxor %xmm1, %xmm1
1514 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1517 ; AVX1-LABEL: shuffle_v4i32_01z3:
1519 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1520 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1523 ; AVX2-LABEL: shuffle_v4i32_01z3:
1525 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1526 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1528 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1529 ret <4 x i32> %shuffle
1532 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1533 ; SSE2-LABEL: shuffle_v4i32_012z:
1535 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1538 ; SSE3-LABEL: shuffle_v4i32_012z:
1540 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1543 ; SSSE3-LABEL: shuffle_v4i32_012z:
1545 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1548 ; SSE41-LABEL: shuffle_v4i32_012z:
1550 ; SSE41-NEXT: pxor %xmm1, %xmm1
1551 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1554 ; AVX1-LABEL: shuffle_v4i32_012z:
1556 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1557 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1560 ; AVX2-LABEL: shuffle_v4i32_012z:
1562 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1563 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1565 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1566 ret <4 x i32> %shuffle
1569 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1570 ; SSE2-LABEL: shuffle_v4i32_0zz3:
1572 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1575 ; SSE3-LABEL: shuffle_v4i32_0zz3:
1577 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1580 ; SSSE3-LABEL: shuffle_v4i32_0zz3:
1582 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1585 ; SSE41-LABEL: shuffle_v4i32_0zz3:
1587 ; SSE41-NEXT: pxor %xmm1, %xmm1
1588 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1591 ; AVX1-LABEL: shuffle_v4i32_0zz3:
1593 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1594 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1597 ; AVX2-LABEL: shuffle_v4i32_0zz3:
1599 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1600 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1602 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1603 ret <4 x i32> %shuffle
1606 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1607 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1609 ; SSE-NEXT: movd %edi, %xmm0
1612 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1614 ; AVX-NEXT: vmovd %edi, %xmm0
1616 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1617 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1618 ret <4 x i32> %shuffle
1621 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1622 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1624 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1627 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1629 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1632 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1633 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1634 ret <4 x i32> %shuffle
1637 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1638 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1640 ; SSE2-NEXT: xorps %xmm1, %xmm1
1641 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1642 ; SSE2-NEXT: movaps %xmm1, %xmm0
1645 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1647 ; SSE3-NEXT: xorps %xmm1, %xmm1
1648 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1649 ; SSE3-NEXT: movaps %xmm1, %xmm0
1652 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1654 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1655 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1656 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1659 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1661 ; SSE41-NEXT: xorps %xmm1, %xmm1
1662 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1665 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1667 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1668 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1670 %v = insertelement <4 x float> undef, float %a, i32 0
1671 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1672 ret <4 x float> %shuffle
1675 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1676 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1678 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1681 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1683 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1685 %a = load float* %ptr
1686 %v = insertelement <4 x float> undef, float %a, i32 0
1687 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1688 ret <4 x float> %shuffle
1691 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1692 ; SSE2-LABEL: insert_reg_lo_v4i32:
1694 ; SSE2-NEXT: movd %rdi, %xmm1
1695 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1698 ; SSE3-LABEL: insert_reg_lo_v4i32:
1700 ; SSE3-NEXT: movd %rdi, %xmm1
1701 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1704 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1706 ; SSSE3-NEXT: movd %rdi, %xmm1
1707 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1710 ; SSE41-LABEL: insert_reg_lo_v4i32:
1712 ; SSE41-NEXT: movd %rdi, %xmm1
1713 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1716 ; AVX1-LABEL: insert_reg_lo_v4i32:
1718 ; AVX1-NEXT: vmovq %rdi, %xmm1
1719 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1722 ; AVX2-LABEL: insert_reg_lo_v4i32:
1724 ; AVX2-NEXT: vmovq %rdi, %xmm1
1725 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1727 %a.cast = bitcast i64 %a to <2 x i32>
1728 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1729 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1730 ret <4 x i32> %shuffle
1733 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1734 ; SSE2-LABEL: insert_mem_lo_v4i32:
1736 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1739 ; SSE3-LABEL: insert_mem_lo_v4i32:
1741 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1744 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1746 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1749 ; SSE41-LABEL: insert_mem_lo_v4i32:
1751 ; SSE41-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1752 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1755 ; AVX1-LABEL: insert_mem_lo_v4i32:
1757 ; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1758 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1761 ; AVX2-LABEL: insert_mem_lo_v4i32:
1763 ; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1764 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1766 %a = load <2 x i32>* %ptr
1767 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1768 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1769 ret <4 x i32> %shuffle
1772 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1773 ; SSE-LABEL: insert_reg_hi_v4i32:
1775 ; SSE-NEXT: movd %rdi, %xmm1
1776 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1779 ; AVX-LABEL: insert_reg_hi_v4i32:
1781 ; AVX-NEXT: vmovq %rdi, %xmm1
1782 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1784 %a.cast = bitcast i64 %a to <2 x i32>
1785 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1786 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1787 ret <4 x i32> %shuffle
1790 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1791 ; SSE-LABEL: insert_mem_hi_v4i32:
1793 ; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1794 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1797 ; AVX-LABEL: insert_mem_hi_v4i32:
1799 ; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1800 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1802 %a = load <2 x i32>* %ptr
1803 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1804 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1805 ret <4 x i32> %shuffle
1808 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1809 ; SSE-LABEL: insert_reg_lo_v4f32:
1811 ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
1812 ; SSE-NEXT: movapd %xmm1, %xmm0
1815 ; AVX-LABEL: insert_reg_lo_v4f32:
1817 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
1819 %a.cast = bitcast double %a to <2 x float>
1820 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1821 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1822 ret <4 x float> %shuffle
1825 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1826 ; SSE-LABEL: insert_mem_lo_v4f32:
1828 ; SSE-NEXT: movlpd (%rdi), %xmm0
1831 ; AVX-LABEL: insert_mem_lo_v4f32:
1833 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1835 %a = load <2 x float>* %ptr
1836 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1837 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1838 ret <4 x float> %shuffle
1841 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1842 ; SSE-LABEL: insert_reg_hi_v4f32:
1844 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1845 ; SSE-NEXT: movapd %xmm1, %xmm0
1848 ; AVX-LABEL: insert_reg_hi_v4f32:
1850 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1852 %a.cast = bitcast double %a to <2 x float>
1853 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1854 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1855 ret <4 x float> %shuffle
1858 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1859 ; SSE-LABEL: insert_mem_hi_v4f32:
1861 ; SSE-NEXT: movhpd (%rdi), %xmm0
1864 ; AVX-LABEL: insert_mem_hi_v4f32:
1866 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1868 %a = load <2 x float>* %ptr
1869 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1870 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1871 ret <4 x float> %shuffle
1874 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1875 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1877 ; SSE-NEXT: movaps (%rdi), %xmm0
1878 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1881 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1883 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1885 %a = load <4 x float>* %ptr
1886 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1887 ret <4 x float> %shuffle
1891 ; Shuffle to logical bit shifts
1894 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
1895 ; SSE-LABEL: shuffle_v4i32_z0zX:
1897 ; SSE-NEXT: psllq $32, %xmm0
1900 ; AVX-LABEL: shuffle_v4i32_z0zX:
1902 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
1904 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
1905 ret <4 x i32> %shuffle
1908 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
1909 ; SSE-LABEL: shuffle_v4i32_1z3z:
1911 ; SSE-NEXT: psrlq $32, %xmm0
1914 ; AVX-LABEL: shuffle_v4i32_1z3z:
1916 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
1918 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
1919 ret <4 x i32> %shuffle