1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
326 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
329 ; AVX1-LABEL: shuffle_v4i32_0124:
331 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
332 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
335 ; AVX2-LABEL: shuffle_v4i32_0124:
337 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
338 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
340 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
341 ret <4 x i32> %shuffle
343 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
344 ; SSE2-LABEL: shuffle_v4i32_0142:
346 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
347 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
350 ; SSE3-LABEL: shuffle_v4i32_0142:
352 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
353 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
356 ; SSSE3-LABEL: shuffle_v4i32_0142:
358 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
359 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
362 ; SSE41-LABEL: shuffle_v4i32_0142:
364 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
365 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
366 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
369 ; AVX1-LABEL: shuffle_v4i32_0142:
371 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
372 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
373 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
376 ; AVX2-LABEL: shuffle_v4i32_0142:
378 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
379 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
380 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
382 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
383 ret <4 x i32> %shuffle
385 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
386 ; SSE2-LABEL: shuffle_v4i32_0412:
388 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
389 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
390 ; SSE2-NEXT: movaps %xmm1, %xmm0
393 ; SSE3-LABEL: shuffle_v4i32_0412:
395 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
396 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
397 ; SSE3-NEXT: movaps %xmm1, %xmm0
400 ; SSSE3-LABEL: shuffle_v4i32_0412:
402 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
403 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
404 ; SSSE3-NEXT: movaps %xmm1, %xmm0
407 ; SSE41-LABEL: shuffle_v4i32_0412:
409 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
410 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
411 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
414 ; AVX1-LABEL: shuffle_v4i32_0412:
416 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
417 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
418 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
421 ; AVX2-LABEL: shuffle_v4i32_0412:
423 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
424 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
425 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
427 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
428 ret <4 x i32> %shuffle
430 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
431 ; SSE2-LABEL: shuffle_v4i32_4012:
433 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
434 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
435 ; SSE2-NEXT: movaps %xmm1, %xmm0
438 ; SSE3-LABEL: shuffle_v4i32_4012:
440 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
441 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
442 ; SSE3-NEXT: movaps %xmm1, %xmm0
445 ; SSSE3-LABEL: shuffle_v4i32_4012:
447 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
448 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
449 ; SSSE3-NEXT: movaps %xmm1, %xmm0
452 ; SSE41-LABEL: shuffle_v4i32_4012:
454 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
455 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
458 ; AVX1-LABEL: shuffle_v4i32_4012:
460 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
461 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
464 ; AVX2-LABEL: shuffle_v4i32_4012:
466 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
467 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
469 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
470 ret <4 x i32> %shuffle
472 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
473 ; SSE-LABEL: shuffle_v4i32_0145:
475 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
478 ; AVX-LABEL: shuffle_v4i32_0145:
480 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
482 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
483 ret <4 x i32> %shuffle
485 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
486 ; SSE2-LABEL: shuffle_v4i32_0451:
488 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
489 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
492 ; SSE3-LABEL: shuffle_v4i32_0451:
494 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
495 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
498 ; SSSE3-LABEL: shuffle_v4i32_0451:
500 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
501 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
504 ; SSE41-LABEL: shuffle_v4i32_0451:
506 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
507 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
508 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
511 ; AVX1-LABEL: shuffle_v4i32_0451:
513 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
514 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
515 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
518 ; AVX2-LABEL: shuffle_v4i32_0451:
520 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
521 ; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
522 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
524 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
525 ret <4 x i32> %shuffle
527 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
528 ; SSE-LABEL: shuffle_v4i32_4501:
530 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
531 ; SSE-NEXT: movdqa %xmm1, %xmm0
534 ; AVX-LABEL: shuffle_v4i32_4501:
536 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
538 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
539 ret <4 x i32> %shuffle
541 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
542 ; SSE2-LABEL: shuffle_v4i32_4015:
544 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
545 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
548 ; SSE3-LABEL: shuffle_v4i32_4015:
550 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
551 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
554 ; SSSE3-LABEL: shuffle_v4i32_4015:
556 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
557 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
560 ; SSE41-LABEL: shuffle_v4i32_4015:
562 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
563 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
564 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
567 ; AVX1-LABEL: shuffle_v4i32_4015:
569 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
570 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
571 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
574 ; AVX2-LABEL: shuffle_v4i32_4015:
576 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
577 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
578 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
580 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
581 ret <4 x i32> %shuffle
584 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
585 ; SSE2-LABEL: shuffle_v4f32_4zzz:
587 ; SSE2-NEXT: xorps %xmm1, %xmm1
588 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
589 ; SSE2-NEXT: movaps %xmm1, %xmm0
592 ; SSE3-LABEL: shuffle_v4f32_4zzz:
594 ; SSE3-NEXT: xorps %xmm1, %xmm1
595 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
596 ; SSE3-NEXT: movaps %xmm1, %xmm0
599 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
601 ; SSSE3-NEXT: xorps %xmm1, %xmm1
602 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
603 ; SSSE3-NEXT: movaps %xmm1, %xmm0
606 ; SSE41-LABEL: shuffle_v4f32_4zzz:
608 ; SSE41-NEXT: xorps %xmm1, %xmm1
609 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
612 ; AVX-LABEL: shuffle_v4f32_4zzz:
614 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
615 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
617 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
618 ret <4 x float> %shuffle
621 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
622 ; SSE2-LABEL: shuffle_v4f32_z4zz:
624 ; SSE2-NEXT: xorps %xmm1, %xmm1
625 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
626 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
629 ; SSE3-LABEL: shuffle_v4f32_z4zz:
631 ; SSE3-NEXT: xorps %xmm1, %xmm1
632 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
633 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
636 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
638 ; SSSE3-NEXT: xorps %xmm1, %xmm1
639 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
640 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
643 ; SSE41-LABEL: shuffle_v4f32_z4zz:
645 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
648 ; AVX-LABEL: shuffle_v4f32_z4zz:
650 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
652 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
653 ret <4 x float> %shuffle
656 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
657 ; SSE2-LABEL: shuffle_v4f32_zz4z:
659 ; SSE2-NEXT: xorps %xmm1, %xmm1
660 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
661 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
662 ; SSE2-NEXT: movaps %xmm1, %xmm0
665 ; SSE3-LABEL: shuffle_v4f32_zz4z:
667 ; SSE3-NEXT: xorps %xmm1, %xmm1
668 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
669 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
670 ; SSE3-NEXT: movaps %xmm1, %xmm0
673 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
675 ; SSSE3-NEXT: xorps %xmm1, %xmm1
676 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
677 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
678 ; SSSE3-NEXT: movaps %xmm1, %xmm0
681 ; SSE41-LABEL: shuffle_v4f32_zz4z:
683 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
686 ; AVX-LABEL: shuffle_v4f32_zz4z:
688 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
690 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
691 ret <4 x float> %shuffle
694 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
695 ; SSE2-LABEL: shuffle_v4f32_zuu4:
697 ; SSE2-NEXT: xorps %xmm1, %xmm1
698 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
699 ; SSE2-NEXT: movaps %xmm1, %xmm0
702 ; SSE3-LABEL: shuffle_v4f32_zuu4:
704 ; SSE3-NEXT: xorps %xmm1, %xmm1
705 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
706 ; SSE3-NEXT: movaps %xmm1, %xmm0
709 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
711 ; SSSE3-NEXT: xorps %xmm1, %xmm1
712 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
713 ; SSSE3-NEXT: movaps %xmm1, %xmm0
716 ; SSE41-LABEL: shuffle_v4f32_zuu4:
718 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
721 ; AVX-LABEL: shuffle_v4f32_zuu4:
723 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
725 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
726 ret <4 x float> %shuffle
729 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
730 ; SSE2-LABEL: shuffle_v4f32_zzz7:
732 ; SSE2-NEXT: xorps %xmm1, %xmm1
733 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
734 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
735 ; SSE2-NEXT: movaps %xmm1, %xmm0
738 ; SSE3-LABEL: shuffle_v4f32_zzz7:
740 ; SSE3-NEXT: xorps %xmm1, %xmm1
741 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
742 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
743 ; SSE3-NEXT: movaps %xmm1, %xmm0
746 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
748 ; SSSE3-NEXT: xorps %xmm1, %xmm1
749 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
750 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
751 ; SSSE3-NEXT: movaps %xmm1, %xmm0
754 ; SSE41-LABEL: shuffle_v4f32_zzz7:
756 ; SSE41-NEXT: xorps %xmm1, %xmm1
757 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
760 ; AVX-LABEL: shuffle_v4f32_zzz7:
762 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
763 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
765 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
766 ret <4 x float> %shuffle
769 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
770 ; SSE2-LABEL: shuffle_v4f32_z6zz:
772 ; SSE2-NEXT: xorps %xmm1, %xmm1
773 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
774 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
777 ; SSE3-LABEL: shuffle_v4f32_z6zz:
779 ; SSE3-NEXT: xorps %xmm1, %xmm1
780 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
781 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
784 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
786 ; SSSE3-NEXT: xorps %xmm1, %xmm1
787 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
788 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
791 ; SSE41-LABEL: shuffle_v4f32_z6zz:
793 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
796 ; AVX-LABEL: shuffle_v4f32_z6zz:
798 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
800 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
801 ret <4 x float> %shuffle
804 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
805 ; SSE2-LABEL: shuffle_v4f32_0z23:
807 ; SSE2-NEXT: xorps %xmm1, %xmm1
808 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
809 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
810 ; SSE2-NEXT: movaps %xmm1, %xmm0
813 ; SSE3-LABEL: shuffle_v4f32_0z23:
815 ; SSE3-NEXT: xorps %xmm1, %xmm1
816 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
817 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
818 ; SSE3-NEXT: movaps %xmm1, %xmm0
821 ; SSSE3-LABEL: shuffle_v4f32_0z23:
823 ; SSSE3-NEXT: xorps %xmm1, %xmm1
824 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
825 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
826 ; SSSE3-NEXT: movaps %xmm1, %xmm0
829 ; SSE41-LABEL: shuffle_v4f32_0z23:
831 ; SSE41-NEXT: xorps %xmm1, %xmm1
832 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
835 ; AVX-LABEL: shuffle_v4f32_0z23:
837 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
838 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
840 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
841 ret <4 x float> %shuffle
844 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
845 ; SSE2-LABEL: shuffle_v4f32_01z3:
847 ; SSE2-NEXT: xorps %xmm1, %xmm1
848 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
849 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
852 ; SSE3-LABEL: shuffle_v4f32_01z3:
854 ; SSE3-NEXT: xorps %xmm1, %xmm1
855 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
856 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
859 ; SSSE3-LABEL: shuffle_v4f32_01z3:
861 ; SSSE3-NEXT: xorps %xmm1, %xmm1
862 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
863 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
866 ; SSE41-LABEL: shuffle_v4f32_01z3:
868 ; SSE41-NEXT: xorps %xmm1, %xmm1
869 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
872 ; AVX-LABEL: shuffle_v4f32_01z3:
874 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
875 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
877 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
878 ret <4 x float> %shuffle
881 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
882 ; SSE2-LABEL: shuffle_v4f32_012z:
884 ; SSE2-NEXT: xorps %xmm1, %xmm1
885 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
886 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
889 ; SSE3-LABEL: shuffle_v4f32_012z:
891 ; SSE3-NEXT: xorps %xmm1, %xmm1
892 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
893 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
896 ; SSSE3-LABEL: shuffle_v4f32_012z:
898 ; SSSE3-NEXT: xorps %xmm1, %xmm1
899 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
900 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
903 ; SSE41-LABEL: shuffle_v4f32_012z:
905 ; SSE41-NEXT: xorps %xmm1, %xmm1
906 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
909 ; AVX-LABEL: shuffle_v4f32_012z:
911 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
912 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
914 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
915 ret <4 x float> %shuffle
918 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
919 ; SSE2-LABEL: shuffle_v4f32_0zz3:
921 ; SSE2-NEXT: xorps %xmm1, %xmm1
922 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
923 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
926 ; SSE3-LABEL: shuffle_v4f32_0zz3:
928 ; SSE3-NEXT: xorps %xmm1, %xmm1
929 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
930 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
933 ; SSSE3-LABEL: shuffle_v4f32_0zz3:
935 ; SSSE3-NEXT: xorps %xmm1, %xmm1
936 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
937 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
940 ; SSE41-LABEL: shuffle_v4f32_0zz3:
942 ; SSE41-NEXT: xorps %xmm1, %xmm1
943 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
946 ; AVX-LABEL: shuffle_v4f32_0zz3:
948 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
949 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
951 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
952 ret <4 x float> %shuffle
955 define <4 x float> @shuffle_v4f32_0z2z(<4 x float> %v) {
956 ; SSE2-LABEL: shuffle_v4f32_0z2z:
958 ; SSE2-NEXT: xorps %xmm1, %xmm1
959 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
960 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
963 ; SSE3-LABEL: shuffle_v4f32_0z2z:
965 ; SSE3-NEXT: xorps %xmm1, %xmm1
966 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
967 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
970 ; SSSE3-LABEL: shuffle_v4f32_0z2z:
972 ; SSSE3-NEXT: xorps %xmm1, %xmm1
973 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
974 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
977 ; SSE41-LABEL: shuffle_v4f32_0z2z:
979 ; SSE41-NEXT: xorps %xmm1, %xmm1
980 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
983 ; AVX-LABEL: shuffle_v4f32_0z2z:
985 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
986 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
988 %shuffle = shufflevector <4 x float> %v, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 2, i32 4>
989 ret <4 x float> %shuffle
992 define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float> %b) {
993 ; SSE-LABEL: shuffle_v4f32_u051:
995 ; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
996 ; SSE-NEXT: movaps %xmm1, %xmm0
999 ; AVX-LABEL: shuffle_v4f32_u051:
1001 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1003 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 undef, i32 0, i32 5, i32 1>
1004 ret <4 x float> %shuffle
1007 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
1008 ; SSE2-LABEL: shuffle_v4i32_4zzz:
1010 ; SSE2-NEXT: xorps %xmm1, %xmm1
1011 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1012 ; SSE2-NEXT: movaps %xmm1, %xmm0
1015 ; SSE3-LABEL: shuffle_v4i32_4zzz:
1017 ; SSE3-NEXT: xorps %xmm1, %xmm1
1018 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1019 ; SSE3-NEXT: movaps %xmm1, %xmm0
1022 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
1024 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1025 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1026 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1029 ; SSE41-LABEL: shuffle_v4i32_4zzz:
1031 ; SSE41-NEXT: pxor %xmm1, %xmm1
1032 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1035 ; AVX-LABEL: shuffle_v4i32_4zzz:
1037 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1038 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1040 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
1041 ret <4 x i32> %shuffle
1044 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
1045 ; SSE2-LABEL: shuffle_v4i32_z4zz:
1047 ; SSE2-NEXT: xorps %xmm1, %xmm1
1048 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1049 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1052 ; SSE3-LABEL: shuffle_v4i32_z4zz:
1054 ; SSE3-NEXT: xorps %xmm1, %xmm1
1055 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1056 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1059 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
1061 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1062 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1063 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1066 ; SSE41-LABEL: shuffle_v4i32_z4zz:
1068 ; SSE41-NEXT: pxor %xmm1, %xmm1
1069 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1070 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1073 ; AVX-LABEL: shuffle_v4i32_z4zz:
1075 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1076 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1077 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
1079 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
1080 ret <4 x i32> %shuffle
1083 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
1084 ; SSE2-LABEL: shuffle_v4i32_zz4z:
1086 ; SSE2-NEXT: xorps %xmm1, %xmm1
1087 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1088 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1091 ; SSE3-LABEL: shuffle_v4i32_zz4z:
1093 ; SSE3-NEXT: xorps %xmm1, %xmm1
1094 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1095 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1098 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
1100 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1101 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1102 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1105 ; SSE41-LABEL: shuffle_v4i32_zz4z:
1107 ; SSE41-NEXT: pxor %xmm1, %xmm1
1108 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1109 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1112 ; AVX-LABEL: shuffle_v4i32_zz4z:
1114 ; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
1115 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1116 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
1118 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
1119 ret <4 x i32> %shuffle
1122 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
1123 ; SSE-LABEL: shuffle_v4i32_zuu4:
1125 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1128 ; AVX-LABEL: shuffle_v4i32_zuu4:
1130 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1132 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
1133 ret <4 x i32> %shuffle
1136 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
1137 ; SSE2-LABEL: shuffle_v4i32_z6zz:
1139 ; SSE2-NEXT: xorps %xmm1, %xmm1
1140 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1141 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1144 ; SSE3-LABEL: shuffle_v4i32_z6zz:
1146 ; SSE3-NEXT: xorps %xmm1, %xmm1
1147 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1148 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1151 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
1153 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1154 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1155 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1158 ; SSE41-LABEL: shuffle_v4i32_z6zz:
1160 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
1161 ; SSE41-NEXT: pxor %xmm0, %xmm0
1162 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1165 ; AVX1-LABEL: shuffle_v4i32_z6zz:
1167 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
1168 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1169 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5,6,7]
1172 ; AVX2-LABEL: shuffle_v4i32_z6zz:
1174 ; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
1175 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1176 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1178 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
1179 ret <4 x i32> %shuffle
1182 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
1183 ; SSE2-LABEL: shuffle_v4i32_7012:
1185 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1186 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1187 ; SSE2-NEXT: movaps %xmm1, %xmm0
1190 ; SSE3-LABEL: shuffle_v4i32_7012:
1192 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1193 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1194 ; SSE3-NEXT: movaps %xmm1, %xmm0
1197 ; SSSE3-LABEL: shuffle_v4i32_7012:
1199 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1202 ; SSE41-LABEL: shuffle_v4i32_7012:
1204 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1207 ; AVX-LABEL: shuffle_v4i32_7012:
1209 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1211 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
1212 ret <4 x i32> %shuffle
1215 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
1216 ; SSE2-LABEL: shuffle_v4i32_6701:
1218 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1219 ; SSE2-NEXT: movapd %xmm1, %xmm0
1222 ; SSE3-LABEL: shuffle_v4i32_6701:
1224 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
1225 ; SSE3-NEXT: movapd %xmm1, %xmm0
1228 ; SSSE3-LABEL: shuffle_v4i32_6701:
1230 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1233 ; SSE41-LABEL: shuffle_v4i32_6701:
1235 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1238 ; AVX-LABEL: shuffle_v4i32_6701:
1240 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1242 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
1243 ret <4 x i32> %shuffle
1246 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
1247 ; SSE2-LABEL: shuffle_v4i32_5670:
1249 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1250 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1251 ; SSE2-NEXT: movaps %xmm1, %xmm0
1254 ; SSE3-LABEL: shuffle_v4i32_5670:
1256 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1257 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1258 ; SSE3-NEXT: movaps %xmm1, %xmm0
1261 ; SSSE3-LABEL: shuffle_v4i32_5670:
1263 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1266 ; SSE41-LABEL: shuffle_v4i32_5670:
1268 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1271 ; AVX-LABEL: shuffle_v4i32_5670:
1273 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1275 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1276 ret <4 x i32> %shuffle
1279 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1280 ; SSE2-LABEL: shuffle_v4i32_1234:
1282 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1283 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1286 ; SSE3-LABEL: shuffle_v4i32_1234:
1288 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1289 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1292 ; SSSE3-LABEL: shuffle_v4i32_1234:
1294 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1295 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1298 ; SSE41-LABEL: shuffle_v4i32_1234:
1300 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1301 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1304 ; AVX-LABEL: shuffle_v4i32_1234:
1306 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1308 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1309 ret <4 x i32> %shuffle
1312 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1313 ; SSE2-LABEL: shuffle_v4i32_2345:
1315 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1318 ; SSE3-LABEL: shuffle_v4i32_2345:
1320 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
1323 ; SSSE3-LABEL: shuffle_v4i32_2345:
1325 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1326 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1329 ; SSE41-LABEL: shuffle_v4i32_2345:
1331 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1332 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1335 ; AVX-LABEL: shuffle_v4i32_2345:
1337 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1339 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1340 ret <4 x i32> %shuffle
1343 define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
1344 ; SSE-LABEL: shuffle_v4i32_40u1:
1346 ; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1347 ; SSE-NEXT: movdqa %xmm1, %xmm0
1350 ; AVX-LABEL: shuffle_v4i32_40u1:
1352 ; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1354 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
1355 ret <4 x i32> %shuffle
1358 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1359 ; SSE2-LABEL: shuffle_v4i32_3456:
1361 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1362 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1365 ; SSE3-LABEL: shuffle_v4i32_3456:
1367 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1368 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1371 ; SSSE3-LABEL: shuffle_v4i32_3456:
1373 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1374 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1377 ; SSE41-LABEL: shuffle_v4i32_3456:
1379 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1380 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1383 ; AVX-LABEL: shuffle_v4i32_3456:
1385 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1387 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1388 ret <4 x i32> %shuffle
1391 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1392 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1394 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1397 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1399 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1402 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1404 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1407 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1409 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1412 ; AVX-LABEL: shuffle_v4i32_0u1u:
1414 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1416 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1417 ret <4 x i32> %shuffle
1420 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1421 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1423 ; SSE2-NEXT: pxor %xmm1, %xmm1
1424 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1427 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1429 ; SSE3-NEXT: pxor %xmm1, %xmm1
1430 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1433 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1435 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1436 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1439 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1441 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1444 ; AVX-LABEL: shuffle_v4i32_0z1z:
1446 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1448 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1449 ret <4 x i32> %shuffle
1452 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1453 ; SSE-LABEL: shuffle_v4i32_01zu:
1455 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1458 ; AVX-LABEL: shuffle_v4i32_01zu:
1460 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1462 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1463 ret <4 x i32> %shuffle
1466 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1467 ; SSE2-LABEL: shuffle_v4i32_0z23:
1469 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1472 ; SSE3-LABEL: shuffle_v4i32_0z23:
1474 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1477 ; SSSE3-LABEL: shuffle_v4i32_0z23:
1479 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1482 ; SSE41-LABEL: shuffle_v4i32_0z23:
1484 ; SSE41-NEXT: pxor %xmm1, %xmm1
1485 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1488 ; AVX1-LABEL: shuffle_v4i32_0z23:
1490 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1491 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1494 ; AVX2-LABEL: shuffle_v4i32_0z23:
1496 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1497 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1499 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1500 ret <4 x i32> %shuffle
1503 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1504 ; SSE2-LABEL: shuffle_v4i32_01z3:
1506 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1509 ; SSE3-LABEL: shuffle_v4i32_01z3:
1511 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1514 ; SSSE3-LABEL: shuffle_v4i32_01z3:
1516 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1519 ; SSE41-LABEL: shuffle_v4i32_01z3:
1521 ; SSE41-NEXT: pxor %xmm1, %xmm1
1522 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1525 ; AVX1-LABEL: shuffle_v4i32_01z3:
1527 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1528 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1531 ; AVX2-LABEL: shuffle_v4i32_01z3:
1533 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1534 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1536 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1537 ret <4 x i32> %shuffle
1540 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1541 ; SSE2-LABEL: shuffle_v4i32_012z:
1543 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1546 ; SSE3-LABEL: shuffle_v4i32_012z:
1548 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1551 ; SSSE3-LABEL: shuffle_v4i32_012z:
1553 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1556 ; SSE41-LABEL: shuffle_v4i32_012z:
1558 ; SSE41-NEXT: pxor %xmm1, %xmm1
1559 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1562 ; AVX1-LABEL: shuffle_v4i32_012z:
1564 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1565 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
1568 ; AVX2-LABEL: shuffle_v4i32_012z:
1570 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1571 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1573 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1574 ret <4 x i32> %shuffle
1577 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1578 ; SSE2-LABEL: shuffle_v4i32_0zz3:
1580 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1583 ; SSE3-LABEL: shuffle_v4i32_0zz3:
1585 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1588 ; SSSE3-LABEL: shuffle_v4i32_0zz3:
1590 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1593 ; SSE41-LABEL: shuffle_v4i32_0zz3:
1595 ; SSE41-NEXT: pxor %xmm1, %xmm1
1596 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1599 ; AVX1-LABEL: shuffle_v4i32_0zz3:
1601 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1602 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
1605 ; AVX2-LABEL: shuffle_v4i32_0zz3:
1607 ; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1608 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1610 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1611 ret <4 x i32> %shuffle
1614 define <4 x i32> @shuffle_v4i32_bitcast_0415(<4 x i32> %a, <4 x i32> %b) {
1615 ; SSE-LABEL: shuffle_v4i32_bitcast_0415:
1617 ; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1620 ; AVX-LABEL: shuffle_v4i32_bitcast_0415:
1622 ; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1624 %shuffle32 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 0, i32 4>
1625 %bitcast64 = bitcast <4 x i32> %shuffle32 to <2 x double>
1626 %shuffle64 = shufflevector <2 x double> %bitcast64, <2 x double> undef, <2 x i32> <i32 1, i32 0>
1627 %bitcast32 = bitcast <2 x double> %shuffle64 to <4 x i32>
1628 ret <4 x i32> %bitcast32
1631 define <4 x float> @shuffle_v4f32_bitcast_4401(<4 x float> %a, <4 x i32> %b) {
1632 ; SSE-LABEL: shuffle_v4f32_bitcast_4401:
1634 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
1635 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1636 ; SSE-NEXT: movapd %xmm1, %xmm0
1639 ; AVX-LABEL: shuffle_v4f32_bitcast_4401:
1641 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
1642 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1644 %1 = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1645 %2 = bitcast <4 x i32> %1 to <2 x double>
1646 %3 = bitcast <4 x float> %a to <2 x double>
1647 %4 = shufflevector <2 x double> %2, <2 x double> %3, <2 x i32> <i32 0, i32 2>
1648 %5 = bitcast <2 x double> %4 to <4 x float>
1652 define <4 x float> @shuffle_v4f32_bitcast_0045(<4 x float> %a, <4 x i32> %b) {
1653 ; SSE-LABEL: shuffle_v4f32_bitcast_0045:
1655 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1658 ; AVX-LABEL: shuffle_v4f32_bitcast_0045:
1660 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1662 %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1663 %2 = bitcast <4 x i32> %b to <4 x float>
1664 %3 = shufflevector <4 x float> %1, <4 x float> %2, <4 x i32> <i32 1, i32 0, i32 4, i32 5>
1668 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1669 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1671 ; SSE-NEXT: movd %edi, %xmm0
1674 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1676 ; AVX-NEXT: vmovd %edi, %xmm0
1678 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1679 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1680 ret <4 x i32> %shuffle
1683 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1684 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1686 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1689 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1691 ; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1693 %a = load i32, i32* %ptr
1694 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1695 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1696 ret <4 x i32> %shuffle
1699 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1700 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1702 ; SSE2-NEXT: xorps %xmm1, %xmm1
1703 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1704 ; SSE2-NEXT: movaps %xmm1, %xmm0
1707 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1709 ; SSE3-NEXT: xorps %xmm1, %xmm1
1710 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1711 ; SSE3-NEXT: movaps %xmm1, %xmm0
1714 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1716 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1717 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1718 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1721 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1723 ; SSE41-NEXT: xorps %xmm1, %xmm1
1724 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1727 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1729 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1730 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1732 %v = insertelement <4 x float> undef, float %a, i32 0
1733 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1734 ret <4 x float> %shuffle
1737 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1738 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1740 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1743 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1745 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
1747 %a = load float, float* %ptr
1748 %v = insertelement <4 x float> undef, float %a, i32 0
1749 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1750 ret <4 x float> %shuffle
1753 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1754 ; SSE2-LABEL: insert_reg_lo_v4i32:
1756 ; SSE2-NEXT: movd %rdi, %xmm1
1757 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1760 ; SSE3-LABEL: insert_reg_lo_v4i32:
1762 ; SSE3-NEXT: movd %rdi, %xmm1
1763 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1766 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1768 ; SSSE3-NEXT: movd %rdi, %xmm1
1769 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1772 ; SSE41-LABEL: insert_reg_lo_v4i32:
1774 ; SSE41-NEXT: movd %rdi, %xmm1
1775 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1778 ; AVX1-LABEL: insert_reg_lo_v4i32:
1780 ; AVX1-NEXT: vmovq %rdi, %xmm1
1781 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1784 ; AVX2-LABEL: insert_reg_lo_v4i32:
1786 ; AVX2-NEXT: vmovq %rdi, %xmm1
1787 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1789 %a.cast = bitcast i64 %a to <2 x i32>
1790 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1791 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1792 ret <4 x i32> %shuffle
1795 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1796 ; SSE2-LABEL: insert_mem_lo_v4i32:
1798 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1801 ; SSE3-LABEL: insert_mem_lo_v4i32:
1803 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1806 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1808 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1811 ; SSE41-LABEL: insert_mem_lo_v4i32:
1813 ; SSE41-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1814 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1817 ; AVX1-LABEL: insert_mem_lo_v4i32:
1819 ; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1820 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1823 ; AVX2-LABEL: insert_mem_lo_v4i32:
1825 ; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1826 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1828 %a = load <2 x i32>, <2 x i32>* %ptr
1829 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1830 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1831 ret <4 x i32> %shuffle
1834 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1835 ; SSE-LABEL: insert_reg_hi_v4i32:
1837 ; SSE-NEXT: movd %rdi, %xmm1
1838 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1841 ; AVX-LABEL: insert_reg_hi_v4i32:
1843 ; AVX-NEXT: vmovq %rdi, %xmm1
1844 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1846 %a.cast = bitcast i64 %a to <2 x i32>
1847 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1848 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1849 ret <4 x i32> %shuffle
1852 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1853 ; SSE-LABEL: insert_mem_hi_v4i32:
1855 ; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
1856 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1859 ; AVX-LABEL: insert_mem_hi_v4i32:
1861 ; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
1862 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1864 %a = load <2 x i32>, <2 x i32>* %ptr
1865 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1866 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1867 ret <4 x i32> %shuffle
1870 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1871 ; SSE-LABEL: insert_reg_lo_v4f32:
1873 ; SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
1874 ; SSE-NEXT: movapd %xmm1, %xmm0
1877 ; AVX-LABEL: insert_reg_lo_v4f32:
1879 ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
1881 %a.cast = bitcast double %a to <2 x float>
1882 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1883 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1884 ret <4 x float> %shuffle
1887 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1888 ; SSE-LABEL: insert_mem_lo_v4f32:
1890 ; SSE-NEXT: movlpd (%rdi), %xmm0
1893 ; AVX-LABEL: insert_mem_lo_v4f32:
1895 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1897 %a = load <2 x float>, <2 x float>* %ptr
1898 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1899 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1900 ret <4 x float> %shuffle
1903 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1904 ; SSE-LABEL: insert_reg_hi_v4f32:
1906 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1907 ; SSE-NEXT: movapd %xmm1, %xmm0
1910 ; AVX-LABEL: insert_reg_hi_v4f32:
1912 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1914 %a.cast = bitcast double %a to <2 x float>
1915 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1916 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1917 ret <4 x float> %shuffle
1920 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1921 ; SSE-LABEL: insert_mem_hi_v4f32:
1923 ; SSE-NEXT: movhpd (%rdi), %xmm0
1926 ; AVX-LABEL: insert_mem_hi_v4f32:
1928 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1930 %a = load <2 x float>, <2 x float>* %ptr
1931 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1932 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1933 ret <4 x float> %shuffle
1936 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1937 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1939 ; SSE-NEXT: movaps (%rdi), %xmm0
1940 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1943 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1945 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1947 %a = load <4 x float>, <4 x float>* %ptr
1948 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1949 ret <4 x float> %shuffle
1952 define <4 x i32> @insert_dup_mem_v4i32(i32* %ptr) {
1953 ; SSE-LABEL: insert_dup_mem_v4i32:
1955 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1956 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
1959 ; AVX-LABEL: insert_dup_mem_v4i32:
1961 ; AVX-NEXT: vbroadcastss (%rdi), %xmm0
1963 %tmp = load i32, i32* %ptr, align 4
1964 %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %tmp, i32 0
1965 %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> zeroinitializer
1970 ; Shuffle to logical bit shifts
1973 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
1974 ; SSE-LABEL: shuffle_v4i32_z0zX:
1976 ; SSE-NEXT: psllq $32, %xmm0
1979 ; AVX-LABEL: shuffle_v4i32_z0zX:
1981 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
1983 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
1984 ret <4 x i32> %shuffle
1987 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
1988 ; SSE-LABEL: shuffle_v4i32_1z3z:
1990 ; SSE-NEXT: psrlq $32, %xmm0
1993 ; AVX-LABEL: shuffle_v4i32_1z3z:
1995 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
1997 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
1998 ret <4 x i32> %shuffle