1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
8 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
9 target triple = "x86_64-unknown-unknown"
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
17 ; AVX-LABEL: shuffle_v4i32_0001:
19 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
30 ; AVX-LABEL: shuffle_v4i32_0020:
32 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
43 ; AVX-LABEL: shuffle_v4i32_0112:
45 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
56 ; AVX-LABEL: shuffle_v4i32_0300:
58 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
69 ; AVX-LABEL: shuffle_v4i32_1000:
71 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
82 ; AVX-LABEL: shuffle_v4i32_2200:
84 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
95 ; AVX-LABEL: shuffle_v4i32_3330:
97 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
108 ; AVX-LABEL: shuffle_v4i32_3210:
110 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
122 ; AVX-LABEL: shuffle_v4i32_2121:
124 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
136 ; AVX-LABEL: shuffle_v4f32_0001:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
149 ; AVX-LABEL: shuffle_v4f32_0020:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
162 ; AVX-LABEL: shuffle_v4f32_0300:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
175 ; AVX-LABEL: shuffle_v4f32_1000:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
188 ; AVX-LABEL: shuffle_v4f32_2200:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
201 ; AVX-LABEL: shuffle_v4f32_3330:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
214 ; AVX-LABEL: shuffle_v4f32_3210:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
227 ; AVX-LABEL: shuffle_v4f32_0011:
229 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
240 ; AVX-LABEL: shuffle_v4f32_2233:
242 ; AVX-NEXT: vunpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
253 ; SSE3-LABEL: shuffle_v4f32_0022:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
263 ; SSE41-LABEL: shuffle_v4f32_0022:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
268 ; AVX-LABEL: shuffle_v4f32_0022:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
281 ; SSE3-LABEL: shuffle_v4f32_1133:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
291 ; SSE41-LABEL: shuffle_v4f32_1133:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
296 ; AVX-LABEL: shuffle_v4f32_1133:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
304 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
305 ; SSE2-LABEL: shuffle_v4i32_0124:
307 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
308 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
311 ; SSE3-LABEL: shuffle_v4i32_0124:
313 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
314 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
317 ; SSSE3-LABEL: shuffle_v4i32_0124:
319 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
320 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
323 ; SSE41-LABEL: shuffle_v4i32_0124:
325 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
328 ; AVX-LABEL: shuffle_v4i32_0124:
330 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
332 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
333 ret <4 x i32> %shuffle
335 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
336 ; SSE-LABEL: shuffle_v4i32_0142:
338 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
339 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
342 ; AVX-LABEL: shuffle_v4i32_0142:
344 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
345 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
347 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
348 ret <4 x i32> %shuffle
350 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
351 ; SSE-LABEL: shuffle_v4i32_0412:
353 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
354 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
355 ; SSE-NEXT: movaps %xmm1, %xmm0
358 ; AVX-LABEL: shuffle_v4i32_0412:
360 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
361 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[2,0],xmm0[1,2]
363 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
364 ret <4 x i32> %shuffle
366 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
367 ; SSE-LABEL: shuffle_v4i32_4012:
369 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
370 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
371 ; SSE-NEXT: movaps %xmm1, %xmm0
374 ; AVX-LABEL: shuffle_v4i32_4012:
376 ; AVX-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
377 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[1,2]
379 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
380 ret <4 x i32> %shuffle
382 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
383 ; SSE-LABEL: shuffle_v4i32_0145:
385 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388 ; AVX-LABEL: shuffle_v4i32_0145:
390 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
392 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
393 ret <4 x i32> %shuffle
395 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
396 ; SSE-LABEL: shuffle_v4i32_0451:
398 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
399 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
402 ; AVX-LABEL: shuffle_v4i32_0451:
404 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
405 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
407 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
408 ret <4 x i32> %shuffle
410 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
411 ; SSE-LABEL: shuffle_v4i32_4501:
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
414 ; SSE-NEXT: movdqa %xmm1, %xmm0
417 ; AVX-LABEL: shuffle_v4i32_4501:
419 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
421 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
422 ret <4 x i32> %shuffle
424 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
425 ; SSE-LABEL: shuffle_v4i32_4015:
427 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
428 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
431 ; AVX-LABEL: shuffle_v4i32_4015:
433 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,1]
434 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[2,0,1,3]
436 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
437 ret <4 x i32> %shuffle
440 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
441 ; SSE2-LABEL: shuffle_v4f32_4zzz:
443 ; SSE2-NEXT: xorps %xmm1, %xmm1
444 ; SSE2-NEXT: movss %xmm0, %xmm1
445 ; SSE2-NEXT: movaps %xmm1, %xmm0
448 ; SSE3-LABEL: shuffle_v4f32_4zzz:
450 ; SSE3-NEXT: xorps %xmm1, %xmm1
451 ; SSE3-NEXT: movss %xmm0, %xmm1
452 ; SSE3-NEXT: movaps %xmm1, %xmm0
455 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
457 ; SSSE3-NEXT: xorps %xmm1, %xmm1
458 ; SSSE3-NEXT: movss %xmm0, %xmm1
459 ; SSSE3-NEXT: movaps %xmm1, %xmm0
462 ; SSE41-LABEL: shuffle_v4f32_4zzz:
464 ; SSE41-NEXT: xorps %xmm1, %xmm1
465 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
466 ; SSE41-NEXT: movaps %xmm1, %xmm0
469 ; AVX-LABEL: shuffle_v4f32_4zzz:
471 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
472 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
474 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
475 ret <4 x float> %shuffle
478 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
479 ; SSE2-LABEL: shuffle_v4f32_z4zz:
481 ; SSE2-NEXT: xorps %xmm1, %xmm1
482 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
483 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
486 ; SSE3-LABEL: shuffle_v4f32_z4zz:
488 ; SSE3-NEXT: xorps %xmm1, %xmm1
489 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
490 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
493 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
495 ; SSSE3-NEXT: xorps %xmm1, %xmm1
496 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
497 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
500 ; SSE41-LABEL: shuffle_v4f32_z4zz:
502 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
505 ; AVX-LABEL: shuffle_v4f32_z4zz:
507 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
509 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
510 ret <4 x float> %shuffle
513 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
514 ; SSE2-LABEL: shuffle_v4f32_zz4z:
516 ; SSE2-NEXT: xorps %xmm1, %xmm1
517 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
518 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
519 ; SSE2-NEXT: movaps %xmm1, %xmm0
522 ; SSE3-LABEL: shuffle_v4f32_zz4z:
524 ; SSE3-NEXT: xorps %xmm1, %xmm1
525 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
526 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
527 ; SSE3-NEXT: movaps %xmm1, %xmm0
530 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
532 ; SSSE3-NEXT: xorps %xmm1, %xmm1
533 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
534 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,2]
535 ; SSSE3-NEXT: movaps %xmm1, %xmm0
538 ; SSE41-LABEL: shuffle_v4f32_zz4z:
540 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
543 ; AVX-LABEL: shuffle_v4f32_zz4z:
545 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
547 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
548 ret <4 x float> %shuffle
551 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
552 ; SSE2-LABEL: shuffle_v4f32_zuu4:
554 ; SSE2-NEXT: xorps %xmm1, %xmm1
555 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
556 ; SSE2-NEXT: movaps %xmm1, %xmm0
559 ; SSE3-LABEL: shuffle_v4f32_zuu4:
561 ; SSE3-NEXT: xorps %xmm1, %xmm1
562 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
563 ; SSE3-NEXT: movaps %xmm1, %xmm0
566 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
568 ; SSSE3-NEXT: xorps %xmm1, %xmm1
569 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
570 ; SSSE3-NEXT: movaps %xmm1, %xmm0
573 ; SSE41-LABEL: shuffle_v4f32_zuu4:
575 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
578 ; AVX-LABEL: shuffle_v4f32_zuu4:
580 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
582 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
583 ret <4 x float> %shuffle
586 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
587 ; SSE2-LABEL: shuffle_v4f32_zzz7:
589 ; SSE2-NEXT: xorps %xmm1, %xmm1
590 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
591 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
592 ; SSE2-NEXT: movaps %xmm1, %xmm0
595 ; SSE3-LABEL: shuffle_v4f32_zzz7:
597 ; SSE3-NEXT: xorps %xmm1, %xmm1
598 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
599 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
600 ; SSE3-NEXT: movaps %xmm1, %xmm0
603 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
605 ; SSSE3-NEXT: xorps %xmm1, %xmm1
606 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
607 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
608 ; SSSE3-NEXT: movaps %xmm1, %xmm0
611 ; SSE41-LABEL: shuffle_v4f32_zzz7:
613 ; SSE41-NEXT: xorps %xmm1, %xmm1
614 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm1[0,1,2],xmm0[3]
615 ; SSE41-NEXT: movaps %xmm1, %xmm0
618 ; AVX-LABEL: shuffle_v4f32_zzz7:
620 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
621 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
623 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
624 ret <4 x float> %shuffle
627 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
628 ; SSE2-LABEL: shuffle_v4f32_z6zz:
630 ; SSE2-NEXT: xorps %xmm1, %xmm1
631 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
632 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
635 ; SSE3-LABEL: shuffle_v4f32_z6zz:
637 ; SSE3-NEXT: xorps %xmm1, %xmm1
638 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
639 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
642 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
644 ; SSSE3-NEXT: xorps %xmm1, %xmm1
645 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
646 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
649 ; SSE41-LABEL: shuffle_v4f32_z6zz:
651 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
654 ; AVX-LABEL: shuffle_v4f32_z6zz:
656 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
658 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
659 ret <4 x float> %shuffle
662 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
663 ; SSE2-LABEL: shuffle_v4i32_4zzz:
665 ; SSE2-NEXT: xorps %xmm1, %xmm1
666 ; SSE2-NEXT: movss %xmm0, %xmm1
667 ; SSE2-NEXT: movaps %xmm1, %xmm0
670 ; SSE3-LABEL: shuffle_v4i32_4zzz:
672 ; SSE3-NEXT: xorps %xmm1, %xmm1
673 ; SSE3-NEXT: movss %xmm0, %xmm1
674 ; SSE3-NEXT: movaps %xmm1, %xmm0
677 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
679 ; SSSE3-NEXT: xorps %xmm1, %xmm1
680 ; SSSE3-NEXT: movss %xmm0, %xmm1
681 ; SSSE3-NEXT: movaps %xmm1, %xmm0
684 ; SSE41-LABEL: shuffle_v4i32_4zzz:
686 ; SSE41-NEXT: xorps %xmm1, %xmm1
687 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
688 ; SSE41-NEXT: movaps %xmm1, %xmm0
691 ; AVX-LABEL: shuffle_v4i32_4zzz:
693 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
694 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
696 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
697 ret <4 x i32> %shuffle
700 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
701 ; SSE2-LABEL: shuffle_v4i32_z4zz:
703 ; SSE2-NEXT: xorps %xmm1, %xmm1
704 ; SSE2-NEXT: movss %xmm0, %xmm1
705 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
708 ; SSE3-LABEL: shuffle_v4i32_z4zz:
710 ; SSE3-NEXT: xorps %xmm1, %xmm1
711 ; SSE3-NEXT: movss %xmm0, %xmm1
712 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
715 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
717 ; SSSE3-NEXT: xorps %xmm1, %xmm1
718 ; SSSE3-NEXT: movss %xmm0, %xmm1
719 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
722 ; SSE41-LABEL: shuffle_v4i32_z4zz:
724 ; SSE41-NEXT: xorps %xmm1, %xmm1
725 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
726 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
729 ; AVX-LABEL: shuffle_v4i32_z4zz:
731 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
732 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
733 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
735 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
736 ret <4 x i32> %shuffle
739 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
740 ; SSE2-LABEL: shuffle_v4i32_zz4z:
742 ; SSE2-NEXT: xorps %xmm1, %xmm1
743 ; SSE2-NEXT: movss %xmm0, %xmm1
744 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
747 ; SSE3-LABEL: shuffle_v4i32_zz4z:
749 ; SSE3-NEXT: xorps %xmm1, %xmm1
750 ; SSE3-NEXT: movss %xmm0, %xmm1
751 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
754 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
756 ; SSSE3-NEXT: xorps %xmm1, %xmm1
757 ; SSSE3-NEXT: movss %xmm0, %xmm1
758 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
761 ; SSE41-LABEL: shuffle_v4i32_zz4z:
763 ; SSE41-NEXT: xorps %xmm1, %xmm1
764 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
765 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
768 ; AVX-LABEL: shuffle_v4i32_zz4z:
770 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
771 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
772 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
774 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
775 ret <4 x i32> %shuffle
778 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
779 ; SSE2-LABEL: shuffle_v4i32_zuu4:
781 ; SSE2-NEXT: xorps %xmm1, %xmm1
782 ; SSE2-NEXT: movss %xmm0, %xmm1
783 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
786 ; SSE3-LABEL: shuffle_v4i32_zuu4:
788 ; SSE3-NEXT: xorps %xmm1, %xmm1
789 ; SSE3-NEXT: movss %xmm0, %xmm1
790 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
793 ; SSSE3-LABEL: shuffle_v4i32_zuu4:
795 ; SSSE3-NEXT: xorps %xmm1, %xmm1
796 ; SSSE3-NEXT: movss %xmm0, %xmm1
797 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
800 ; SSE41-LABEL: shuffle_v4i32_zuu4:
802 ; SSE41-NEXT: xorps %xmm1, %xmm1
803 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
804 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,0]
807 ; AVX-LABEL: shuffle_v4i32_zuu4:
809 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
810 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
811 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,0]
813 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
814 ret <4 x i32> %shuffle
817 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
818 ; SSE2-LABEL: shuffle_v4i32_z6zz:
820 ; SSE2-NEXT: xorps %xmm1, %xmm1
821 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
822 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
825 ; SSE3-LABEL: shuffle_v4i32_z6zz:
827 ; SSE3-NEXT: xorps %xmm1, %xmm1
828 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
829 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
832 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
834 ; SSSE3-NEXT: xorps %xmm1, %xmm1
835 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
836 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
839 ; SSE41-LABEL: shuffle_v4i32_z6zz:
841 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
844 ; AVX-LABEL: shuffle_v4i32_z6zz:
846 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
848 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
849 ret <4 x i32> %shuffle
852 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
853 ; SSE2-LABEL: shuffle_v4i32_7012:
855 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
856 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
857 ; SSE2-NEXT: movaps %xmm1, %xmm0
860 ; SSE3-LABEL: shuffle_v4i32_7012:
862 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
863 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
864 ; SSE3-NEXT: movaps %xmm1, %xmm0
867 ; SSSE3-LABEL: shuffle_v4i32_7012:
869 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
872 ; SSE41-LABEL: shuffle_v4i32_7012:
874 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
877 ; AVX-LABEL: shuffle_v4i32_7012:
879 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
881 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
882 ret <4 x i32> %shuffle
885 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
886 ; SSE2-LABEL: shuffle_v4i32_6701:
888 ; SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
889 ; SSE2-NEXT: movapd %xmm1, %xmm0
892 ; SSE3-LABEL: shuffle_v4i32_6701:
894 ; SSE3-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
895 ; SSE3-NEXT: movapd %xmm1, %xmm0
898 ; SSSE3-LABEL: shuffle_v4i32_6701:
900 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
903 ; SSE41-LABEL: shuffle_v4i32_6701:
905 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
908 ; AVX-LABEL: shuffle_v4i32_6701:
910 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
912 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
913 ret <4 x i32> %shuffle
916 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
917 ; SSE2-LABEL: shuffle_v4i32_5670:
919 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
920 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
921 ; SSE2-NEXT: movaps %xmm1, %xmm0
924 ; SSE3-LABEL: shuffle_v4i32_5670:
926 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
927 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
928 ; SSE3-NEXT: movaps %xmm1, %xmm0
931 ; SSSE3-LABEL: shuffle_v4i32_5670:
933 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
936 ; SSE41-LABEL: shuffle_v4i32_5670:
938 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
941 ; AVX-LABEL: shuffle_v4i32_5670:
943 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
945 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
946 ret <4 x i32> %shuffle
949 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
950 ; SSE2-LABEL: shuffle_v4i32_1234:
952 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
953 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
956 ; SSE3-LABEL: shuffle_v4i32_1234:
958 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
959 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
962 ; SSSE3-LABEL: shuffle_v4i32_1234:
964 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
965 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
968 ; SSE41-LABEL: shuffle_v4i32_1234:
970 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
971 ; SSE41-NEXT: movdqa %xmm1, %xmm0
974 ; AVX-LABEL: shuffle_v4i32_1234:
976 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
978 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
979 ret <4 x i32> %shuffle
982 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
983 ; SSE2-LABEL: shuffle_v4i32_2345:
985 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
988 ; SSE3-LABEL: shuffle_v4i32_2345:
990 ; SSE3-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
993 ; SSSE3-LABEL: shuffle_v4i32_2345:
995 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
996 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
999 ; SSE41-LABEL: shuffle_v4i32_2345:
1001 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1002 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1005 ; AVX-LABEL: shuffle_v4i32_2345:
1007 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1009 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1010 ret <4 x i32> %shuffle
1013 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1014 ; SSE2-LABEL: shuffle_v4i32_3456:
1016 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1017 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1020 ; SSE3-LABEL: shuffle_v4i32_3456:
1022 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1023 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1026 ; SSSE3-LABEL: shuffle_v4i32_3456:
1028 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1029 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1032 ; SSE41-LABEL: shuffle_v4i32_3456:
1034 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1035 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1038 ; AVX-LABEL: shuffle_v4i32_3456:
1040 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1042 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1043 ret <4 x i32> %shuffle
1046 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1047 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1049 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1052 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1054 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1057 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1059 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1062 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1064 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
1067 ; AVX-LABEL: shuffle_v4i32_0u1u:
1069 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
1071 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1072 ret <4 x i32> %shuffle
1075 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1076 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1078 ; SSE2-NEXT: pxor %xmm1, %xmm1
1079 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1082 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1084 ; SSE3-NEXT: pxor %xmm1, %xmm1
1085 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1088 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1090 ; SSSE3-NEXT: pxor %xmm1, %xmm1
1091 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1094 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1096 ; SSE41-NEXT: pmovzxdq %xmm0, %xmm0
1099 ; AVX-LABEL: shuffle_v4i32_0z1z:
1101 ; AVX-NEXT: vpmovzxdq %xmm0, %xmm0
1103 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1104 ret <4 x i32> %shuffle
1107 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
1108 ; SSE-LABEL: insert_reg_and_zero_v4i32:
1110 ; SSE-NEXT: movd %edi, %xmm0
1113 ; AVX-LABEL: insert_reg_and_zero_v4i32:
1115 ; AVX-NEXT: vmovd %edi, %xmm0
1117 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1118 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1119 ret <4 x i32> %shuffle
1122 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
1123 ; SSE-LABEL: insert_mem_and_zero_v4i32:
1125 ; SSE-NEXT: movd (%rdi), %xmm0
1128 ; AVX-LABEL: insert_mem_and_zero_v4i32:
1130 ; AVX-NEXT: vmovd (%rdi), %xmm0
1133 %v = insertelement <4 x i32> undef, i32 %a, i32 0
1134 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1135 ret <4 x i32> %shuffle
1138 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
1139 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
1141 ; SSE2-NEXT: xorps %xmm1, %xmm1
1142 ; SSE2-NEXT: movss %xmm0, %xmm1
1143 ; SSE2-NEXT: movaps %xmm1, %xmm0
1146 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
1148 ; SSE3-NEXT: xorps %xmm1, %xmm1
1149 ; SSE3-NEXT: movss %xmm0, %xmm1
1150 ; SSE3-NEXT: movaps %xmm1, %xmm0
1153 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
1155 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1156 ; SSSE3-NEXT: movss %xmm0, %xmm1
1157 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1160 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
1162 ; SSE41-NEXT: xorps %xmm1, %xmm1
1163 ; SSE41-NEXT: blendps {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1164 ; SSE41-NEXT: movaps %xmm1, %xmm0
1167 ; AVX-LABEL: insert_reg_and_zero_v4f32:
1169 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1170 ; AVX-NEXT: vmovss %xmm0, %xmm1, %xmm0
1172 %v = insertelement <4 x float> undef, float %a, i32 0
1173 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1174 ret <4 x float> %shuffle
1177 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
1178 ; SSE-LABEL: insert_mem_and_zero_v4f32:
1180 ; SSE-NEXT: movss (%rdi), %xmm0
1183 ; AVX-LABEL: insert_mem_and_zero_v4f32:
1185 ; AVX-NEXT: vmovss (%rdi), %xmm0
1187 %a = load float* %ptr
1188 %v = insertelement <4 x float> undef, float %a, i32 0
1189 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1190 ret <4 x float> %shuffle
1193 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
1194 ; SSE2-LABEL: insert_reg_lo_v4i32:
1196 ; SSE2-NEXT: movd %rdi, %xmm1
1197 ; SSE2-NEXT: movsd %xmm1, %xmm0
1200 ; SSE3-LABEL: insert_reg_lo_v4i32:
1202 ; SSE3-NEXT: movd %rdi, %xmm1
1203 ; SSE3-NEXT: movsd %xmm1, %xmm0
1206 ; SSSE3-LABEL: insert_reg_lo_v4i32:
1208 ; SSSE3-NEXT: movd %rdi, %xmm1
1209 ; SSSE3-NEXT: movsd %xmm1, %xmm0
1212 ; SSE41-LABEL: insert_reg_lo_v4i32:
1214 ; SSE41-NEXT: movd %rdi, %xmm1
1215 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1216 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1219 ; AVX1-LABEL: insert_reg_lo_v4i32:
1221 ; AVX1-NEXT: vmovq %rdi, %xmm1
1222 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1225 ; AVX2-LABEL: insert_reg_lo_v4i32:
1227 ; AVX2-NEXT: vmovq %rdi, %xmm1
1228 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1230 %a.cast = bitcast i64 %a to <2 x i32>
1231 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1232 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1233 ret <4 x i32> %shuffle
1236 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1237 ; SSE2-LABEL: insert_mem_lo_v4i32:
1239 ; SSE2-NEXT: movlpd (%rdi), %xmm0
1242 ; SSE3-LABEL: insert_mem_lo_v4i32:
1244 ; SSE3-NEXT: movlpd (%rdi), %xmm0
1247 ; SSSE3-LABEL: insert_mem_lo_v4i32:
1249 ; SSSE3-NEXT: movlpd (%rdi), %xmm0
1252 ; SSE41-LABEL: insert_mem_lo_v4i32:
1254 ; SSE41-NEXT: movq (%rdi), %xmm1
1255 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1256 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1259 ; AVX1-LABEL: insert_mem_lo_v4i32:
1261 ; AVX1-NEXT: vmovq (%rdi), %xmm1
1262 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
1265 ; AVX2-LABEL: insert_mem_lo_v4i32:
1267 ; AVX2-NEXT: vmovq (%rdi), %xmm1
1268 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
1270 %a = load <2 x i32>* %ptr
1271 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1272 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1273 ret <4 x i32> %shuffle
1276 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
1277 ; SSE-LABEL: insert_reg_hi_v4i32:
1279 ; SSE-NEXT: movd %rdi, %xmm1
1280 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1283 ; AVX-LABEL: insert_reg_hi_v4i32:
1285 ; AVX-NEXT: vmovq %rdi, %xmm1
1286 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1288 %a.cast = bitcast i64 %a to <2 x i32>
1289 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1290 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1291 ret <4 x i32> %shuffle
1294 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
1295 ; SSE-LABEL: insert_mem_hi_v4i32:
1297 ; SSE-NEXT: movq (%rdi), %xmm1
1298 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1301 ; AVX-LABEL: insert_mem_hi_v4i32:
1303 ; AVX-NEXT: vmovq (%rdi), %xmm1
1304 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1306 %a = load <2 x i32>* %ptr
1307 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1308 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1309 ret <4 x i32> %shuffle
1312 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
1313 ; SSE-LABEL: insert_reg_lo_v4f32:
1315 ; SSE-NEXT: movsd %xmm0, %xmm1
1316 ; SSE-NEXT: movaps %xmm1, %xmm0
1319 ; AVX-LABEL: insert_reg_lo_v4f32:
1321 ; AVX-NEXT: vmovsd %xmm0, %xmm1, %xmm0
1323 %a.cast = bitcast double %a to <2 x float>
1324 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1325 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1326 ret <4 x float> %shuffle
1329 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1330 ; SSE-LABEL: insert_mem_lo_v4f32:
1332 ; SSE-NEXT: movlpd (%rdi), %xmm0
1335 ; AVX-LABEL: insert_mem_lo_v4f32:
1337 ; AVX-NEXT: vmovlpd (%rdi), %xmm0, %xmm0
1339 %a = load <2 x float>* %ptr
1340 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1341 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
1342 ret <4 x float> %shuffle
1345 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
1346 ; SSE-LABEL: insert_reg_hi_v4f32:
1348 ; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0]
1349 ; SSE-NEXT: movapd %xmm1, %xmm0
1352 ; AVX-LABEL: insert_reg_hi_v4f32:
1354 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1356 %a.cast = bitcast double %a to <2 x float>
1357 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1358 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1359 ret <4 x float> %shuffle
1362 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
1363 ; SSE-LABEL: insert_mem_hi_v4f32:
1365 ; SSE-NEXT: movhpd (%rdi), %xmm0
1368 ; AVX-LABEL: insert_mem_hi_v4f32:
1370 ; AVX-NEXT: vmovhpd (%rdi), %xmm0, %xmm0
1372 %a = load <2 x float>* %ptr
1373 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
1374 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
1375 ret <4 x float> %shuffle
1378 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
1379 ; SSE-LABEL: shuffle_mem_v4f32_3210:
1381 ; SSE-NEXT: movaps (%rdi), %xmm0
1382 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
1385 ; AVX-LABEL: shuffle_mem_v4f32_3210:
1387 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
1389 %a = load <4 x float>* %ptr
1390 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
1391 ret <4 x float> %shuffle