1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=pentium4 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
6 define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
7 ; SSE-LABEL: sext_8i16_to_8i32:
9 ; SSE-NEXT: movdqa %xmm0, %xmm1
10 ; SSE-NEXT: ## kill: XMM0<def> XMM1<kill>
11 ; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
12 ; SSE-NEXT: pslld $16, %xmm0
13 ; SSE-NEXT: psrad $16, %xmm0
14 ; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
15 ; SSE-NEXT: pslld $16, %xmm1
16 ; SSE-NEXT: psrad $16, %xmm1
19 ; AVX1-LABEL: sext_8i16_to_8i32:
21 ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1
22 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
23 ; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0
24 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
27 ; AVX2-LABEL: sext_8i16_to_8i32:
29 ; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
32 %B = sext <8 x i16> %A to <8 x i32>
36 define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
37 ; SSE-LABEL: sext_4i32_to_4i64:
39 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
40 ; SSE-NEXT: movd %xmm1, %rax
42 ; SSE-NEXT: movd %rax, %xmm2
43 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
44 ; SSE-NEXT: movd %xmm1, %rax
46 ; SSE-NEXT: movd %rax, %xmm1
47 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
48 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
49 ; SSE-NEXT: movd %xmm0, %rax
51 ; SSE-NEXT: movd %rax, %xmm1
52 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
53 ; SSE-NEXT: movd %xmm0, %rax
55 ; SSE-NEXT: movd %rax, %xmm0
56 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
57 ; SSE-NEXT: movdqa %xmm2, %xmm0
60 ; AVX1-LABEL: sext_4i32_to_4i64:
62 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
63 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
64 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
65 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
68 ; AVX2-LABEL: sext_4i32_to_4i64:
70 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
73 %B = sext <4 x i32> %A to <4 x i64>
77 define <4 x i32> @load_sext_test1(<4 x i16> *%ptr) {
78 ; SSE-LABEL: load_sext_test1:
80 ; SSE-NEXT: movq (%rdi), %xmm0
81 ; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
82 ; SSE-NEXT: psrad $16, %xmm0
85 ; AVX-LABEL: load_sext_test1:
87 ; AVX-NEXT: vpmovsxwd (%rdi), %xmm0
90 %X = load <4 x i16>* %ptr
91 %Y = sext <4 x i16> %X to <4 x i32>
95 define <4 x i32> @load_sext_test2(<4 x i8> *%ptr) {
96 ; SSE2-LABEL: load_sext_test2:
98 ; SSE2-NEXT: movl (%rdi), %eax
99 ; SSE2-NEXT: movl %eax, %ecx
100 ; SSE2-NEXT: shll $8, %ecx
101 ; SSE2-NEXT: movd %eax, %xmm0
102 ; SSE2-NEXT: pextrw $1, %xmm0, %edx
103 ; SSE2-NEXT: pinsrw $1, %ecx, %xmm0
104 ; SSE2-NEXT: pinsrw $3, %eax, %xmm0
105 ; SSE2-NEXT: movl %edx, %eax
106 ; SSE2-NEXT: shll $8, %eax
107 ; SSE2-NEXT: pinsrw $5, %eax, %xmm0
108 ; SSE2-NEXT: pinsrw $7, %edx, %xmm0
109 ; SSE2-NEXT: psrad $24, %xmm0
112 ; SSSE3-LABEL: load_sext_test2:
114 ; SSSE3-NEXT: movd (%rdi), %xmm0
115 ; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3]
116 ; SSSE3-NEXT: psrad $24, %xmm0
119 ; AVX-LABEL: load_sext_test2:
121 ; AVX-NEXT: vpmovsxbd (%rdi), %xmm0
123 %X = load <4 x i8>* %ptr
124 %Y = sext <4 x i8> %X to <4 x i32>
128 define <2 x i64> @load_sext_test3(<2 x i8> *%ptr) {
129 ; SSE-LABEL: load_sext_test3:
131 ; SSE-NEXT: movsbq 1(%rdi), %rax
132 ; SSE-NEXT: movd %rax, %xmm1
133 ; SSE-NEXT: movsbq (%rdi), %rax
134 ; SSE-NEXT: movd %rax, %xmm0
135 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
138 ; AVX-LABEL: load_sext_test3:
140 ; AVX-NEXT: vpmovsxbq (%rdi), %xmm0
142 %X = load <2 x i8>* %ptr
143 %Y = sext <2 x i8> %X to <2 x i64>
147 define <2 x i64> @load_sext_test4(<2 x i16> *%ptr) {
148 ; SSE-LABEL: load_sext_test4:
150 ; SSE-NEXT: movswq 2(%rdi), %rax
151 ; SSE-NEXT: movd %rax, %xmm1
152 ; SSE-NEXT: movswq (%rdi), %rax
153 ; SSE-NEXT: movd %rax, %xmm0
154 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
157 ; AVX-LABEL: load_sext_test4:
159 ; AVX-NEXT: vpmovsxwq (%rdi), %xmm0
161 %X = load <2 x i16>* %ptr
162 %Y = sext <2 x i16> %X to <2 x i64>
166 define <2 x i64> @load_sext_test5(<2 x i32> *%ptr) {
167 ; SSE-LABEL: load_sext_test5:
169 ; SSE-NEXT: movslq 4(%rdi), %rax
170 ; SSE-NEXT: movd %rax, %xmm1
171 ; SSE-NEXT: movslq (%rdi), %rax
172 ; SSE-NEXT: movd %rax, %xmm0
173 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
176 ; AVX-LABEL: load_sext_test5:
178 ; AVX-NEXT: vpmovsxdq (%rdi), %xmm0
180 %X = load <2 x i32>* %ptr
181 %Y = sext <2 x i32> %X to <2 x i64>
185 define <8 x i16> @load_sext_test6(<8 x i8> *%ptr) {
186 ; SSE-LABEL: load_sext_test6:
188 ; SSE-NEXT: movq (%rdi), %xmm0
189 ; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
190 ; SSE-NEXT: psraw $8, %xmm0
193 ; AVX-LABEL: load_sext_test6:
195 ; AVX-NEXT: vpmovsxbw (%rdi), %xmm0
197 %X = load <8 x i8>* %ptr
198 %Y = sext <8 x i8> %X to <8 x i16>
202 define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) {
203 ; SSE-LABEL: sext_4i1_to_4i64:
205 ; SSE-NEXT: pslld $31, %xmm0
206 ; SSE-NEXT: psrad $31, %xmm0
207 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
208 ; SSE-NEXT: movd %xmm1, %rax
210 ; SSE-NEXT: movd %rax, %xmm2
211 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
212 ; SSE-NEXT: movd %xmm1, %rax
214 ; SSE-NEXT: movd %rax, %xmm1
215 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
216 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
217 ; SSE-NEXT: movd %xmm0, %rax
219 ; SSE-NEXT: movd %rax, %xmm1
220 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
221 ; SSE-NEXT: movd %xmm0, %rax
223 ; SSE-NEXT: movd %rax, %xmm0
224 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
225 ; SSE-NEXT: movdqa %xmm2, %xmm0
228 ; AVX1-LABEL: sext_4i1_to_4i64:
230 ; AVX1-NEXT: vpslld $31, %xmm0, %xmm0
231 ; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0
232 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
233 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
234 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
235 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
238 ; AVX2-LABEL: sext_4i1_to_4i64:
240 ; AVX2-NEXT: vpslld $31, %xmm0, %xmm0
241 ; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0
242 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
244 %extmask = sext <4 x i1> %mask to <4 x i64>
245 ret <4 x i64> %extmask
248 define <16 x i16> @sext_16i8_to_16i16(<16 x i8> *%ptr) {
249 ; SSE-LABEL: sext_16i8_to_16i16:
251 ; SSE-NEXT: movdqa (%rdi), %xmm1
252 ; SSE-NEXT: movdqa %xmm1, %xmm0
253 ; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
254 ; SSE-NEXT: psllw $8, %xmm0
255 ; SSE-NEXT: psraw $8, %xmm0
256 ; SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
257 ; SSE-NEXT: psllw $8, %xmm1
258 ; SSE-NEXT: psraw $8, %xmm1
261 ; AVX1-LABEL: sext_16i8_to_16i16:
263 ; AVX1-NEXT: vmovdqa (%rdi), %xmm0
264 ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1
265 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
266 ; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0
267 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
270 ; AVX2-LABEL: sext_16i8_to_16i16:
272 ; AVX2-NEXT: vmovdqa (%rdi), %xmm0
273 ; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
275 %X = load <16 x i8>* %ptr
276 %Y = sext <16 x i8> %X to <16 x i16>
280 define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) {
281 ; SSE-LABEL: sext_4i8_to_4i64:
283 ; SSE-NEXT: pslld $24, %xmm0
284 ; SSE-NEXT: psrad $24, %xmm0
285 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,0]
286 ; SSE-NEXT: movd %xmm1, %rax
288 ; SSE-NEXT: movd %rax, %xmm2
289 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm1 = xmm1[1,1]
290 ; SSE-NEXT: movd %xmm1, %rax
292 ; SSE-NEXT: movd %rax, %xmm1
293 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
294 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
295 ; SSE-NEXT: movd %xmm0, %rax
297 ; SSE-NEXT: movd %rax, %xmm1
298 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1,1]
299 ; SSE-NEXT: movd %xmm0, %rax
301 ; SSE-NEXT: movd %rax, %xmm0
302 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
303 ; SSE-NEXT: movdqa %xmm2, %xmm0
306 ; AVX1-LABEL: sext_4i8_to_4i64:
308 ; AVX1-NEXT: vpslld $24, %xmm0, %xmm0
309 ; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0
310 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
311 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
312 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
313 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
316 ; AVX2-LABEL: sext_4i8_to_4i64:
318 ; AVX2-NEXT: vpslld $24, %xmm0, %xmm0
319 ; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0
320 ; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
322 %extmask = sext <4 x i8> %mask to <4 x i64>
323 ret <4 x i64> %extmask
326 define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) {
327 ; SSE2-LABEL: load_sext_4i8_to_4i64:
329 ; SSE2-NEXT: movl (%rdi), %eax
330 ; SSE2-NEXT: movd %eax, %xmm1
331 ; SSE2-NEXT: pextrw $1, %xmm1, %ecx
332 ; SSE2-NEXT: pinsrw $0, %eax, %xmm1
333 ; SSE2-NEXT: movzbl %ah, %eax
334 ; SSE2-NEXT: pinsrw $2, %eax, %xmm1
335 ; SSE2-NEXT: pinsrw $4, %ecx, %xmm1
336 ; SSE2-NEXT: shrl $8, %ecx
337 ; SSE2-NEXT: pinsrw $6, %ecx, %xmm1
338 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
339 ; SSE2-NEXT: movd %xmm2, %rax
340 ; SSE2-NEXT: movsbq %al, %rax
341 ; SSE2-NEXT: movd %rax, %xmm0
342 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
343 ; SSE2-NEXT: movd %xmm2, %rax
344 ; SSE2-NEXT: movsbq %al, %rax
345 ; SSE2-NEXT: movd %rax, %xmm2
346 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
347 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
348 ; SSE2-NEXT: movd %xmm2, %rax
349 ; SSE2-NEXT: movsbq %al, %rax
350 ; SSE2-NEXT: movd %rax, %xmm1
351 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
352 ; SSE2-NEXT: movd %xmm2, %rax
353 ; SSE2-NEXT: movsbq %al, %rax
354 ; SSE2-NEXT: movd %rax, %xmm2
355 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
358 ; SSSE3-LABEL: load_sext_4i8_to_4i64:
360 ; SSSE3-NEXT: movd (%rdi), %xmm1
361 ; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
362 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
363 ; SSSE3-NEXT: movd %xmm2, %rax
364 ; SSSE3-NEXT: movsbq %al, %rax
365 ; SSSE3-NEXT: movd %rax, %xmm0
366 ; SSSE3-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
367 ; SSSE3-NEXT: movd %xmm2, %rax
368 ; SSSE3-NEXT: movsbq %al, %rax
369 ; SSSE3-NEXT: movd %rax, %xmm2
370 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
371 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
372 ; SSSE3-NEXT: movd %xmm2, %rax
373 ; SSSE3-NEXT: movsbq %al, %rax
374 ; SSSE3-NEXT: movd %rax, %xmm1
375 ; SSSE3-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
376 ; SSSE3-NEXT: movd %xmm2, %rax
377 ; SSSE3-NEXT: movsbq %al, %rax
378 ; SSSE3-NEXT: movd %rax, %xmm2
379 ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
382 ; AVX1-LABEL: load_sext_4i8_to_4i64:
384 ; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0
385 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
386 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
387 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
388 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
391 ; AVX2-LABEL: load_sext_4i8_to_4i64:
393 ; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0
395 %X = load <4 x i8>* %ptr
396 %Y = sext <4 x i8> %X to <4 x i64>
400 define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) {
401 ; SSE-LABEL: load_sext_4i16_to_4i64:
403 ; SSE-NEXT: movq (%rdi), %xmm1
404 ; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
405 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,1,0]
406 ; SSE-NEXT: movd %xmm2, %rax
407 ; SSE-NEXT: movswq %ax, %rax
408 ; SSE-NEXT: movd %rax, %xmm0
409 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
410 ; SSE-NEXT: movd %xmm2, %rax
411 ; SSE-NEXT: movswq %ax, %rax
412 ; SSE-NEXT: movd %rax, %xmm2
413 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
414 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,0,3,0]
415 ; SSE-NEXT: movd %xmm2, %rax
416 ; SSE-NEXT: movswq %ax, %rax
417 ; SSE-NEXT: movd %rax, %xmm1
418 ; SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1,1]
419 ; SSE-NEXT: movd %xmm2, %rax
420 ; SSE-NEXT: movswq %ax, %rax
421 ; SSE-NEXT: movd %rax, %xmm2
422 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
425 ; AVX1-LABEL: load_sext_4i16_to_4i64:
427 ; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0
428 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
429 ; AVX1-NEXT: vmovhlps {{.*#+}} xmm0 = xmm0[1,1]
430 ; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
431 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
434 ; AVX2-LABEL: load_sext_4i16_to_4i64:
436 ; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0
438 %X = load <4 x i16>* %ptr
439 %Y = sext <4 x i16> %X to <4 x i64>