1 ; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse4.1 | FileCheck %s
3 define void @t1(float* %R, <4 x float>* %P1) nounwind {
5 ; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
6 ; CHECK-NEXT: movl 8(%esp), %[[R1:e[abcd]x]]
7 ; CHECK-NEXT: movss 12(%[[R1]]), %[[R2:xmm.*]]
8 ; CHECK-NEXT: movss %[[R2]], (%[[R0]])
11 %X = load <4 x float>* %P1
12 %tmp = extractelement <4 x float> %X, i32 3
13 store float %tmp, float* %R
17 define float @t2(<4 x float>* %P1) nounwind {
19 ; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
20 ; CHECK-NEXT: flds 8(%[[R0]])
23 %X = load <4 x float>* %P1
24 %tmp = extractelement <4 x float> %X, i32 2
28 define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
30 ; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
31 ; CHECK-NEXT: movl 8(%esp), %[[R1:e[abcd]x]]
32 ; CHECK-NEXT: movl 12(%[[R1]]), %[[R2:e[abcd]x]]
33 ; CHECK-NEXT: movl %[[R2]], (%[[R0]])
36 %X = load <4 x i32>* %P1
37 %tmp = extractelement <4 x i32> %X, i32 3
38 store i32 %tmp, i32* %R
42 define i32 @t4(<4 x i32>* %P1) nounwind {
44 ; CHECK: movl 4(%esp), %[[R0:e[abcd]x]]
45 ; CHECK-NEXT: movl 12(%[[R0]]), %eax
48 %X = load <4 x i32>* %P1
49 %tmp = extractelement <4 x i32> %X, i32 3