1 ; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
2 ; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE
4 define <8 x float> @foo1_8(<8 x i8> %src) {
7 ; CHECK-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4,4,5,5,6,6,7,7]
8 ; CHECK-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
9 ; CHECK-NEXT: vpslld $24, %xmm0, %xmm0
10 ; CHECK-NEXT: vpsrad $24, %xmm0, %xmm0
11 ; CHECK-NEXT: vpslld $24, %xmm1, %xmm1
12 ; CHECK-NEXT: vpsrad $24, %xmm1, %xmm1
13 ; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
14 ; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
17 ; CHECK-WIDE-LABEL: foo1_8:
18 ; CHECK-WIDE: ## BB#0:
19 ; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm1
20 ; CHECK-WIDE-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
21 ; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm0
22 ; CHECK-WIDE-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
23 ; CHECK-WIDE-NEXT: vcvtdq2ps %ymm0, %ymm0
24 ; CHECK-WIDE-NEXT: retl
25 %res = sitofp <8 x i8> %src to <8 x float>
29 define <4 x float> @foo1_4(<4 x i8> %src) {
30 ; CHECK-LABEL: foo1_4:
32 ; CHECK-NEXT: vpslld $24, %xmm0, %xmm0
33 ; CHECK-NEXT: vpsrad $24, %xmm0, %xmm0
34 ; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0
37 ; CHECK-WIDE-LABEL: foo1_4:
38 ; CHECK-WIDE: ## BB#0:
39 ; CHECK-WIDE-NEXT: vpmovsxbd %xmm0, %xmm0
40 ; CHECK-WIDE-NEXT: vcvtdq2ps %xmm0, %xmm0
41 ; CHECK-WIDE-NEXT: retl
42 %res = sitofp <4 x i8> %src to <4 x float>
46 define <8 x float> @foo2_8(<8 x i8> %src) {
47 ; CHECK-LABEL: foo2_8:
49 ; CHECK-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
50 ; CHECK-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7]
51 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
52 ; CHECK-NEXT: vandps LCPI2_0, %ymm0, %ymm0
53 ; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
56 ; CHECK-WIDE-LABEL: foo2_8:
57 ; CHECK-WIDE: ## BB#0:
58 ; CHECK-WIDE-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
59 ; CHECK-WIDE-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
60 ; CHECK-WIDE-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
61 ; CHECK-WIDE-NEXT: vcvtdq2ps %ymm0, %ymm0
62 ; CHECK-WIDE-NEXT: retl
63 %res = uitofp <8 x i8> %src to <8 x float>
67 define <4 x float> @foo2_4(<4 x i8> %src) {
68 ; CHECK-LABEL: foo2_4:
70 ; CHECK-NEXT: vandps LCPI3_0, %xmm0, %xmm0
71 ; CHECK-NEXT: vcvtdq2ps %xmm0, %xmm0
74 ; CHECK-WIDE-LABEL: foo2_4:
75 ; CHECK-WIDE: ## BB#0:
76 ; CHECK-WIDE-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
77 ; CHECK-WIDE-NEXT: vcvtdq2ps %xmm0, %xmm0
78 ; CHECK-WIDE-NEXT: retl
79 %res = uitofp <4 x i8> %src to <4 x float>
83 define <8 x i8> @foo3_8(<8 x float> %src) {
84 ; CHECK-LABEL: foo3_8:
86 ; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
87 ; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
88 ; CHECK-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
89 ; CHECK-NEXT: vpshufb %xmm2, %xmm1, %xmm1
90 ; CHECK-NEXT: vpshufb %xmm2, %xmm0, %xmm0
91 ; CHECK-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
92 ; CHECK-NEXT: vzeroupper
95 ; CHECK-WIDE-LABEL: foo3_8:
96 ; CHECK-WIDE: ## BB#0:
97 ; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
98 ; CHECK-WIDE-NEXT: vpinsrb $0, %eax, %xmm0, %xmm1
99 ; CHECK-WIDE-NEXT: vmovshdup %xmm0, %xmm2 ## xmm2 = xmm0[1,1,3,3]
100 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
101 ; CHECK-WIDE-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
102 ; CHECK-WIDE-NEXT: vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
103 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
104 ; CHECK-WIDE-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
105 ; CHECK-WIDE-NEXT: vpermilps $231, %xmm0, %xmm2 ## xmm2 = xmm0[3,1,2,3]
106 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
107 ; CHECK-WIDE-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1
108 ; CHECK-WIDE-NEXT: vextractf128 $1, %ymm0, %xmm0
109 ; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
110 ; CHECK-WIDE-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1
111 ; CHECK-WIDE-NEXT: vmovshdup %xmm0, %xmm2 ## xmm2 = xmm0[1,1,3,3]
112 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
113 ; CHECK-WIDE-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1
114 ; CHECK-WIDE-NEXT: vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
115 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
116 ; CHECK-WIDE-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1
117 ; CHECK-WIDE-NEXT: vpermilps $231, %xmm0, %xmm0 ## xmm0 = xmm0[3,1,2,3]
118 ; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
119 ; CHECK-WIDE-NEXT: vpinsrb $7, %eax, %xmm1, %xmm0
120 ; CHECK-WIDE-NEXT: vzeroupper
121 ; CHECK-WIDE-NEXT: retl
122 %res = fptosi <8 x float> %src to <8 x i8>
126 define <4 x i8> @foo3_4(<4 x float> %src) {
127 ; CHECK-LABEL: foo3_4:
129 ; CHECK-NEXT: vcvttps2dq %xmm0, %xmm0
132 ; CHECK-WIDE-LABEL: foo3_4:
133 ; CHECK-WIDE: ## BB#0:
134 ; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
135 ; CHECK-WIDE-NEXT: vpinsrb $0, %eax, %xmm0, %xmm1
136 ; CHECK-WIDE-NEXT: vmovshdup %xmm0, %xmm2 ## xmm2 = xmm0[1,1,3,3]
137 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
138 ; CHECK-WIDE-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1
139 ; CHECK-WIDE-NEXT: vpermilpd $1, %xmm0, %xmm2 ## xmm2 = xmm0[1,0]
140 ; CHECK-WIDE-NEXT: vcvttss2si %xmm2, %eax
141 ; CHECK-WIDE-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1
142 ; CHECK-WIDE-NEXT: vpermilps $231, %xmm0, %xmm0 ## xmm0 = xmm0[3,1,2,3]
143 ; CHECK-WIDE-NEXT: vcvttss2si %xmm0, %eax
144 ; CHECK-WIDE-NEXT: vpinsrb $3, %eax, %xmm1, %xmm0
145 ; CHECK-WIDE-NEXT: retl
146 %res = fptosi <4 x float> %src to <4 x i8>