1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=X32
3 ; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=X64
5 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse3-builtins.c
7 define <2 x double> @test_mm_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
8 ; X32-LABEL: test_mm_addsub_pd:
10 ; X32-NEXT: addsubpd %xmm1, %xmm0
13 ; X64-LABEL: test_mm_addsub_pd:
15 ; X64-NEXT: addsubpd %xmm1, %xmm0
17 %res = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)
20 declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
22 define <4 x float> @test_mm_addsub_ps(<4 x float> %a0, <4 x float> %a1) {
23 ; X32-LABEL: test_mm_addsub_ps:
25 ; X32-NEXT: addsubps %xmm1, %xmm0
28 ; X64-LABEL: test_mm_addsub_ps:
30 ; X64-NEXT: addsubps %xmm1, %xmm0
32 %res = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)
35 declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
37 define <2 x double> @test_mm_hadd_pd(<2 x double> %a0, <2 x double> %a1) {
38 ; X32-LABEL: test_mm_hadd_pd:
40 ; X32-NEXT: haddpd %xmm1, %xmm0
43 ; X64-LABEL: test_mm_hadd_pd:
45 ; X64-NEXT: haddpd %xmm1, %xmm0
47 %res = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
50 declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
52 define <4 x float> @test_mm_hadd_ps(<4 x float> %a0, <4 x float> %a1) {
53 ; X32-LABEL: test_mm_hadd_ps:
55 ; X32-NEXT: haddps %xmm1, %xmm0
58 ; X64-LABEL: test_mm_hadd_ps:
60 ; X64-NEXT: haddps %xmm1, %xmm0
62 %res = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
65 declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
67 define <2 x double> @test_mm_hsub_pd(<2 x double> %a0, <2 x double> %a1) {
68 ; X32-LABEL: test_mm_hsub_pd:
70 ; X32-NEXT: hsubpd %xmm1, %xmm0
73 ; X64-LABEL: test_mm_hsub_pd:
75 ; X64-NEXT: hsubpd %xmm1, %xmm0
77 %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
80 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
82 define <4 x float> @test_mm_hsub_ps(<4 x float> %a0, <4 x float> %a1) {
83 ; X32-LABEL: test_mm_hsub_ps:
85 ; X32-NEXT: hsubps %xmm1, %xmm0
88 ; X64-LABEL: test_mm_hsub_ps:
90 ; X64-NEXT: hsubps %xmm1, %xmm0
92 %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)
95 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
97 define <2 x i64> @test_mm_lddqu_si128(i8* %a0) {
98 ; X32-LABEL: test_mm_lddqu_si128:
100 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
101 ; X32-NEXT: lddqu (%eax), %xmm0
104 ; X64-LABEL: test_mm_lddqu_si128:
106 ; X64-NEXT: lddqu (%rdi), %xmm0
108 %call = call <16 x i8> @llvm.x86.sse3.ldu.dq(i8* %a0)
109 %res = bitcast <16 x i8> %call to <2 x i64>
112 declare <16 x i8> @llvm.x86.sse3.ldu.dq(i8*) nounwind readonly
114 define <2 x double> @test_mm_loaddup_pd(double* %a0) {
115 ; X32-LABEL: test_mm_loaddup_pd:
117 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
118 ; X32-NEXT: movddup (%eax), %xmm0
121 ; X64-LABEL: test_mm_loaddup_pd:
123 ; X64-NEXT: movddup (%rdi), %xmm0
125 %ld = load double, double* %a0
126 %res0 = insertelement <2 x double> undef, double %ld, i32 0
127 %res1 = insertelement <2 x double> %res0, double %ld, i32 1
128 ret <2 x double> %res1
131 define <2 x double> @test_mm_movedup_pd(<2 x double> %a0) {
132 ; X32-LABEL: test_mm_movedup_pd:
134 ; X32-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
137 ; X64-LABEL: test_mm_movedup_pd:
139 ; X64-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
141 %res = shufflevector <2 x double> %a0, <2 x double> %a0, <2 x i32> zeroinitializer
142 ret <2 x double> %res
145 define <4 x float> @test_mm_movehdup_ps(<4 x float> %a0) {
146 ; X32-LABEL: test_mm_movehdup_ps:
148 ; X32-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
151 ; X64-LABEL: test_mm_movehdup_ps:
153 ; X64-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
155 %res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
159 define <4 x float> @test_mm_moveldup_ps(<4 x float> %a0) {
160 ; X32-LABEL: test_mm_moveldup_ps:
162 ; X32-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
165 ; X64-LABEL: test_mm_moveldup_ps:
167 ; X64-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
169 %res = shufflevector <4 x float> %a0, <4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 2, i32 2>