1 ; RUN: llc -mtriple=i386-linux-gnu %s -o - | FileCheck %s
2 ; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sahf %s -o - | FileCheck %s
4 ; TODO: Reenable verify-machineinstrs once the if (!AXDead) // FIXME in
5 ; X86InstrInfo::copyPhysReg() is resolved.
7 ; The peephole optimizer can elide some physical register copies such as
8 ; EFLAGS. Make sure the flags are used directly, instead of needlessly using
11 @L = external global i32
12 @M = external global i8
15 ; CHECK-LABEL: plus_one
22 define i1 @plus_one() {
24 %loaded_L = load i32, i32* @L
25 %val = add nsw i32 %loaded_L, 1 ; N.B. will emit inc.
26 store i32 %val, i32* @L
27 %loaded_M = load i8, i8* @M
28 %masked = and i8 %loaded_M, 8
29 %M_is_true = icmp ne i8 %masked, 0
30 %L_is_false = icmp eq i32 %val, 0
31 %cond = and i1 %L_is_false, %M_is_true
32 br i1 %cond, label %exit2, label %exit
41 ; CHECK-LABEL: plus_forty_two
48 define i1 @plus_forty_two() {
50 %loaded_L = load i32, i32* @L
51 %val = add nsw i32 %loaded_L, 42 ; N.B. won't emit inc.
52 store i32 %val, i32* @L
53 %loaded_M = load i8, i8* @M
54 %masked = and i8 %loaded_M, 8
55 %M_is_true = icmp ne i8 %masked, 0
56 %L_is_false = icmp eq i32 %val, 0
57 %cond = and i1 %L_is_false, %M_is_true
58 br i1 %cond, label %exit2, label %exit
67 ; CHECK-LABEL: minus_one
74 define i1 @minus_one() {
76 %loaded_L = load i32, i32* @L
77 %val = add nsw i32 %loaded_L, -1 ; N.B. will emit dec.
78 store i32 %val, i32* @L
79 %loaded_M = load i8, i8* @M
80 %masked = and i8 %loaded_M, 8
81 %M_is_true = icmp ne i8 %masked, 0
82 %L_is_false = icmp eq i32 %val, 0
83 %cond = and i1 %L_is_false, %M_is_true
84 br i1 %cond, label %exit2, label %exit
93 ; CHECK-LABEL: minus_forty_two
100 define i1 @minus_forty_two() {
102 %loaded_L = load i32, i32* @L
103 %val = add nsw i32 %loaded_L, -42 ; N.B. won't emit dec.
104 store i32 %val, i32* @L
105 %loaded_M = load i8, i8* @M
106 %masked = and i8 %loaded_M, 8
107 %M_is_true = icmp ne i8 %masked, 0
108 %L_is_false = icmp eq i32 %val, 0
109 %cond = and i1 %L_is_false, %M_is_true
110 br i1 %cond, label %exit2, label %exit
119 ; CHECK-LABEL: test_intervening_call:
123 ; CHECK: call{{[lq]}} bar
124 ; CHECK: addb $127, %al
126 define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) {
127 ; cmpxchg sets EFLAGS, call clobbers it, then br uses EFLAGS.
128 %cx = cmpxchg i64* %foo, i64 %bar, i64 %baz seq_cst seq_cst
129 %v = extractvalue { i64, i1 } %cx, 0
130 %p = extractvalue { i64, i1 } %cx, 1
131 call i32 @bar(i64 %v)
132 br i1 %p, label %t, label %f
141 ; CHECK-LABEL: test_two_live_flags:
145 ; Save result of the first cmpxchg into D.
146 ; CHECK-NEXT: mov{{[lq]}} %[[AX:[er]ax]], %[[D:[re]d[xi]]]
148 ; CHECK-NEXT: sete %al
149 ; Save result of the second cmpxchg onto the stack.
150 ; CHECK-NEXT: push{{[lq]}} %[[AX]]
151 ; Restore result of the first cmpxchg from D, put it back in EFLAGS.
152 ; CHECK-NEXT: mov{{[lq]}} %[[D]], %[[AX]]
153 ; CHECK-NEXT: addb $127, %al
155 ; Restore result of the second cmpxchg from the stack.
156 ; CHECK-NEXT: pop{{[lq]}} %[[AX]]
157 ; Test from EFLAGS restored from first cmpxchg, jump if that fails.
159 ; Fallthrough to test the second cmpxchg's result.
160 ; CHECK: testb %al, %al
162 define i64 @test_two_live_flags(
163 i64* %foo0, i64 %bar0, i64 %baz0,
164 i64* %foo1, i64 %bar1, i64 %baz1) {
165 %cx0 = cmpxchg i64* %foo0, i64 %bar0, i64 %baz0 seq_cst seq_cst
166 %p0 = extractvalue { i64, i1 } %cx0, 1
167 %cx1 = cmpxchg i64* %foo1, i64 %bar1, i64 %baz1 seq_cst seq_cst
168 %p1 = extractvalue { i64, i1 } %cx1, 1
169 %flag = and i1 %p0, %p1
170 br i1 %flag, label %t, label %f
179 ; CHECK-LABEL: asm_clobbering_flags:
184 ; CHECK-NEXT: #NO_APP
187 define i1 @asm_clobbering_flags(i32* %mem) {
188 %val = load i32, i32* %mem, align 4
189 %cmp = icmp sgt i32 %val, 0
190 %res = tail call i32 asm "bsfl $1,$0", "=r,r,~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %val)
191 store i32 %res, i32* %mem, align 4