1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3 ; InstCombine and DAGCombiner transform an 'add' into an 'or'
4 ; if there are no common bits from the incoming operands.
5 ; LEA instruction selection should be able to see through that
6 ; transform and reduce add/shift/or instruction counts.
8 define i32 @or_shift1_and1(i32 %x, i32 %y) {
9 ; CHECK-LABEL: or_shift1_and1:
11 ; CHECK-NEXT: andl $1, %esi
12 ; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
17 %or = or i32 %and, %shl
21 define i32 @or_shift1_and1_swapped(i32 %x, i32 %y) {
22 ; CHECK-LABEL: or_shift1_and1_swapped:
24 ; CHECK-NEXT: andl $1, %esi
25 ; CHECK-NEXT: leal (%rsi,%rdi,2), %eax
30 %or = or i32 %shl, %and
34 define i32 @or_shift2_and1(i32 %x, i32 %y) {
35 ; CHECK-LABEL: or_shift2_and1:
37 ; CHECK-NEXT: andl $1, %esi
38 ; CHECK-NEXT: leal (%rsi,%rdi,4), %eax
43 %or = or i32 %shl, %and
47 define i32 @or_shift3_and1(i32 %x, i32 %y) {
48 ; CHECK-LABEL: or_shift3_and1:
50 ; CHECK-NEXT: andl $1, %esi
51 ; CHECK-NEXT: leal (%rsi,%rdi,8), %eax
56 %or = or i32 %shl, %and
60 define i32 @or_shift3_and7(i32 %x, i32 %y) {
61 ; CHECK-LABEL: or_shift3_and7:
63 ; CHECK-NEXT: andl $7, %esi
64 ; CHECK-NEXT: leal (%rsi,%rdi,8), %eax
69 %or = or i32 %shl, %and
73 ; The shift is too big for an LEA.
75 define i32 @or_shift4_and1(i32 %x, i32 %y) {
76 ; CHECK-LABEL: or_shift4_and1:
78 ; CHECK-NEXT: shll $4, %edi
79 ; CHECK-NEXT: andl $1, %esi
80 ; CHECK-NEXT: leal (%rsi,%rdi), %eax
85 %or = or i32 %shl, %and
89 ; The mask is too big for the shift, so the 'or' isn't equivalent to an 'add'.
91 define i32 @or_shift3_and8(i32 %x, i32 %y) {
92 ; CHECK-LABEL: or_shift3_and8:
94 ; CHECK-NEXT: leal (,%rdi,8), %eax
95 ; CHECK-NEXT: andl $8, %esi
96 ; CHECK-NEXT: orl %esi, %eax
101 %or = or i32 %shl, %and
105 ; 64-bit operands should work too.
107 define i64 @or_shift1_and1_64(i64 %x, i64 %y) {
108 ; CHECK-LABEL: or_shift1_and1_64:
110 ; CHECK-NEXT: andl $1, %esi
111 ; CHECK-NEXT: leaq (%rsi,%rdi,2), %rax
116 %or = or i64 %and, %shl