1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3 ; InstCombine and DAGCombiner transform an 'add' into an 'or'
4 ; if there are no common bits from the incoming operands.
5 ; LEA instruction selection should be able to see through that
6 ; transform and reduce add/shift/or instruction counts.
8 define i32 @or_shift1_and1(i32 %x, i32 %y) {
9 ; CHECK-LABEL: or_shift1_and1:
11 ; CHECK-NEXT: addl %edi, %edi
12 ; CHECK-NEXT: andl $1, %esi
13 ; CHECK-NEXT: leal (%rsi,%rdi), %eax
18 %or = or i32 %and, %shl
22 define i32 @or_shift1_and1_swapped(i32 %x, i32 %y) {
23 ; CHECK-LABEL: or_shift1_and1_swapped:
25 ; CHECK-NEXT: leal (%rdi,%rdi), %eax
26 ; CHECK-NEXT: andl $1, %esi
27 ; CHECK-NEXT: orl %esi, %eax
32 %or = or i32 %shl, %and
36 define i32 @or_shift2_and1(i32 %x, i32 %y) {
37 ; CHECK-LABEL: or_shift2_and1:
39 ; CHECK-NEXT: leal (,%rdi,4), %eax
40 ; CHECK-NEXT: andl $1, %esi
41 ; CHECK-NEXT: orl %esi, %eax
46 %or = or i32 %shl, %and
50 define i32 @or_shift3_and1(i32 %x, i32 %y) {
51 ; CHECK-LABEL: or_shift3_and1:
53 ; CHECK-NEXT: leal (,%rdi,8), %eax
54 ; CHECK-NEXT: andl $1, %esi
55 ; CHECK-NEXT: orl %esi, %eax
60 %or = or i32 %shl, %and
64 define i32 @or_shift3_and7(i32 %x, i32 %y) {
65 ; CHECK-LABEL: or_shift3_and7:
67 ; CHECK-NEXT: leal (,%rdi,8), %eax
68 ; CHECK-NEXT: andl $7, %esi
69 ; CHECK-NEXT: orl %esi, %eax
74 %or = or i32 %shl, %and
78 ; The shift is too big for an LEA.
80 define i32 @or_shift4_and1(i32 %x, i32 %y) {
81 ; CHECK-LABEL: or_shift4_and1:
83 ; CHECK-NEXT: shll $4, %edi
84 ; CHECK-NEXT: andl $1, %esi
85 ; CHECK-NEXT: leal (%rsi,%rdi), %eax
90 %or = or i32 %shl, %and
94 ; The mask is too big for the shift, so the 'or' isn't equivalent to an 'add'.
96 define i32 @or_shift3_and8(i32 %x, i32 %y) {
97 ; CHECK-LABEL: or_shift3_and8:
99 ; CHECK-NEXT: leal (,%rdi,8), %eax
100 ; CHECK-NEXT: andl $8, %esi
101 ; CHECK-NEXT: orl %esi, %eax
106 %or = or i32 %shl, %and
110 ; 64-bit operands should work too.
112 define i64 @or_shift1_and1_64(i64 %x, i64 %y) {
113 ; CHECK-LABEL: or_shift1_and1_64:
115 ; CHECK-NEXT: addq %rdi, %rdi
116 ; CHECK-NEXT: andl $1, %esi
117 ; CHECK-NEXT: leaq (%rsi,%rdi), %rax
122 %or = or i64 %and, %shl