1 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx
3 ;; A basic sanity check to make sure that MMX arithmetic actually compiles.
5 define void @foo(<8 x i8>* %A, <8 x i8>* %B) {
7 %tmp5 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
8 %tmp7 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
9 %tmp8 = add <8 x i8> %tmp5, %tmp7 ; <<8 x i8>> [#uses=2]
10 store <8 x i8> %tmp8, <8 x i8>* %A
11 %tmp14 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
12 %tmp25 = tail call <8 x i8> @llvm.x86.mmx.padds.b( <8 x i8> %tmp14, <8 x i8> %tmp8 ) ; <<8 x i8>> [#uses=2]
13 store <8 x i8> %tmp25, <8 x i8>* %B
14 %tmp36 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
15 %tmp49 = tail call <8 x i8> @llvm.x86.mmx.paddus.b( <8 x i8> %tmp36, <8 x i8> %tmp25 ) ; <<8 x i8>> [#uses=2]
16 store <8 x i8> %tmp49, <8 x i8>* %B
17 %tmp58 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
18 %tmp61 = sub <8 x i8> %tmp58, %tmp49 ; <<8 x i8>> [#uses=2]
19 store <8 x i8> %tmp61, <8 x i8>* %B
20 %tmp64 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
21 %tmp80 = tail call <8 x i8> @llvm.x86.mmx.psubs.b( <8 x i8> %tmp61, <8 x i8> %tmp64 ) ; <<8 x i8>> [#uses=2]
22 store <8 x i8> %tmp80, <8 x i8>* %A
23 %tmp89 = load <8 x i8>* %B ; <<8 x i8>> [#uses=1]
24 %tmp105 = tail call <8 x i8> @llvm.x86.mmx.psubus.b( <8 x i8> %tmp80, <8 x i8> %tmp89 ) ; <<8 x i8>> [#uses=1]
25 store <8 x i8> %tmp105, <8 x i8>* %A
26 %tmp13 = load <8 x i8>* %A ; <<8 x i8>> [#uses=1]
27 %tmp16 = mul <8 x i8> %tmp13, %tmp105 ; <<8 x i8>> [#uses=1]
28 store <8 x i8> %tmp16, <8 x i8>* %B
29 tail call void @llvm.x86.mmx.emms( )
33 define void @baz(<2 x i32>* %A, <2 x i32>* %B) {
35 %tmp1 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1]
36 %tmp3 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
37 %tmp4 = add <2 x i32> %tmp1, %tmp3 ; <<2 x i32>> [#uses=2]
38 store <2 x i32> %tmp4, <2 x i32>* %A
39 %tmp9 = load <2 x i32>* %B ; <<2 x i32>> [#uses=1]
40 %tmp10 = sub <2 x i32> %tmp4, %tmp9 ; <<2 x i32>> [#uses=1]
41 store <2 x i32> %tmp10, <2 x i32>* %B
42 %tmp13 = load <2 x i32>* %A ; <<2 x i32>> [#uses=1]
43 %tmp16 = mul <2 x i32> %tmp13, %tmp10 ; <<2 x i32>> [#uses=1]
44 store <2 x i32> %tmp16, <2 x i32>* %B
45 tail call void @llvm.x86.mmx.emms( )
49 define void @bar(<4 x i16>* %A, <4 x i16>* %B) {
51 %tmp5 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
52 %tmp7 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
53 %tmp8 = add <4 x i16> %tmp5, %tmp7 ; <<4 x i16>> [#uses=2]
54 store <4 x i16> %tmp8, <4 x i16>* %A
55 %tmp14 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
56 %tmp25 = tail call <4 x i16> @llvm.x86.mmx.padds.w( <4 x i16> %tmp14, <4 x i16> %tmp8 ) ; <<4 x i16>> [#uses=2]
57 store <4 x i16> %tmp25, <4 x i16>* %B
58 %tmp36 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
59 %tmp49 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp36, <4 x i16> %tmp25 ) ; <<4 x i16>> [#uses=2]
60 store <4 x i16> %tmp49, <4 x i16>* %B
61 %tmp58 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
62 %tmp61 = sub <4 x i16> %tmp58, %tmp49 ; <<4 x i16>> [#uses=2]
63 store <4 x i16> %tmp61, <4 x i16>* %B
64 %tmp64 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
65 %tmp80 = tail call <4 x i16> @llvm.x86.mmx.psubs.w( <4 x i16> %tmp61, <4 x i16> %tmp64 ) ; <<4 x i16>> [#uses=2]
66 store <4 x i16> %tmp80, <4 x i16>* %A
67 %tmp89 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
68 %tmp105 = tail call <4 x i16> @llvm.x86.mmx.psubus.w( <4 x i16> %tmp80, <4 x i16> %tmp89 ) ; <<4 x i16>> [#uses=1]
69 store <4 x i16> %tmp105, <4 x i16>* %A
70 %tmp22 = load <4 x i16>* %A ; <<4 x i16>> [#uses=1]
71 %tmp24 = tail call <4 x i16> @llvm.x86.mmx.pmulh.w( <4 x i16> %tmp22, <4 x i16> %tmp105 ) ; <<4 x i16>> [#uses=2]
72 store <4 x i16> %tmp24, <4 x i16>* %A
73 %tmp28 = load <4 x i16>* %B ; <<4 x i16>> [#uses=1]
74 %tmp33 = tail call <2 x i32> @llvm.x86.mmx.pmadd.wd( <4 x i16> %tmp24, <4 x i16> %tmp28 ) ; <<2 x i32>> [#uses=1]
75 %tmp34 = bitcast <2 x i32> %tmp33 to <4 x i16> ; <<4 x i16>> [#uses=1]
76 store <4 x i16> %tmp34, <4 x i16>* %A
77 tail call void @llvm.x86.mmx.emms( )
81 declare <4 x i16> @llvm.x86.mmx.padds.w(<4 x i16>, <4 x i16>)
83 declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
85 declare <4 x i16> @llvm.x86.mmx.psubs.w(<4 x i16>, <4 x i16>)
87 declare <4 x i16> @llvm.x86.mmx.psubus.w(<4 x i16>, <4 x i16>)
89 declare <8 x i8> @llvm.x86.mmx.padds.b(<8 x i8>, <8 x i8>)
91 declare <8 x i8> @llvm.x86.mmx.paddus.b(<8 x i8>, <8 x i8>)
93 declare <8 x i8> @llvm.x86.mmx.psubs.b(<8 x i8>, <8 x i8>)
95 declare <8 x i8> @llvm.x86.mmx.psubus.b(<8 x i8>, <8 x i8>)
97 declare <4 x i16> @llvm.x86.mmx.pmulh.w(<4 x i16>, <4 x i16>)
99 declare <2 x i32> @llvm.x86.mmx.pmadd.wd(<4 x i16>, <4 x i16>)
101 declare void @llvm.x86.mmx.emms()