1 ; RUN: opt -S -codegenprepare %s -o - | FileCheck %s
2 ; RUN: opt -S -codegenprepare -addr-sink-using-gep=1 %s -o - | FileCheck -check-prefix=CHECK-GEP %s
3 ; This file tests the different cases what are involved when codegen prepare
4 ; tries to get sign extension out of the way of addressing mode.
5 ; This tests require an actual target as addressing mode decisions depends
8 target datalayout = "e-i64:64-f80:128-s:64-n8:16:32:64-S128"
9 target triple = "x86_64-apple-macosx"
12 ; Check that we correctly promote both operands of the promotable add.
13 ; CHECK-LABEL: @twoArgsPromotion
14 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg1 to i64
15 ; CHECK: [[ARG2SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg2 to i64
16 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], [[ARG2SEXT]]
17 ; CHECK: inttoptr i64 [[PROMOTED]] to i8*
19 define i8 @twoArgsPromotion(i32 %arg1, i32 %arg2) {
20 %add = add nsw i32 %arg1, %arg2
21 %sextadd = sext i32 %add to i64
22 %base = inttoptr i64 %sextadd to i8*
27 ; Check that we do not promote both operands of the promotable add when
28 ; the instruction will not be folded into the addressing mode.
29 ; Otherwise, we will increase the number of instruction executed.
30 ; (This is a heuristic of course, because the new sext could have been
31 ; merged with something else.)
32 ; CHECK-LABEL: @twoArgsNoPromotion
33 ; CHECK: add nsw i32 %arg1, %arg2
35 define i8 @twoArgsNoPromotion(i32 %arg1, i32 %arg2, i8* %base) {
36 %add = add nsw i32 %arg1, %arg2
37 %sextadd = sext i32 %add to i64
38 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
39 %res = load i8* %arrayidx
43 ; Check that we do not promote when the related instruction does not have
45 ; CHECK-LABEL: @noPromotion
48 define i8 @noPromotion(i32 %arg1, i32 %arg2, i8* %base) {
49 %add = add i32 %arg1, %arg2
50 %sextadd = sext i32 %add to i64
51 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
52 %res = load i8* %arrayidx
56 ; Check that we correctly promote constant arguments.
57 ; CHECK-LABEL: @oneArgPromotion
58 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i32 %arg1 to i64
59 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
60 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
62 define i8 @oneArgPromotion(i32 %arg1, i8* %base) {
63 %add = add nsw i32 %arg1, 1
64 %sextadd = sext i32 %add to i64
65 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
66 %res = load i8* %arrayidx
70 ; Check that we are able to merge a sign extension with a zero extension.
71 ; CHECK-LABEL: @oneArgPromotionZExt
72 ; CHECK: [[ARG1ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 %arg1 to i64
73 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1ZEXT]], 1
74 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
76 define i8 @oneArgPromotionZExt(i8 %arg1, i8* %base) {
77 %zext = zext i8 %arg1 to i32
78 %add = add nsw i32 %zext, 1
79 %sextadd = sext i32 %add to i64
80 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
81 %res = load i8* %arrayidx
85 ; When promoting a constant zext, the IR builder returns a constant,
86 ; not an instruction. Make sure this is properly handled. This used
88 ; Note: The constant zext is promoted, but does not help matching
89 ; more thing in the addressing mode. Therefore the modification is
91 ; Still, this test case exercises the desired code path.
92 ; CHECK-LABEL: @oneArgPromotionCstZExt
93 ; CHECK: [[ZEXT:%[a-zA-Z_0-9-]+]] = zext i16 undef to i32
94 ; CHECK: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i32 [[ZEXT]] to i64
95 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[SEXT]], 1
96 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
98 define i8 @oneArgPromotionCstZExt(i8* %base) {
99 %cst = zext i16 undef to i32
100 %add = add nsw i32 %cst, 1
101 %sextadd = sext i32 %add to i64
102 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
103 %res = load i8* %arrayidx
107 ; Check that we do not promote truncate when we cannot determine the
108 ; bits that are dropped.
109 ; CHECK-LABEL: @oneArgPromotionBlockTrunc1
110 ; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 %arg1 to i8
111 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64
112 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
113 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
115 define i8 @oneArgPromotionBlockTrunc1(i32 %arg1, i8* %base) {
116 %trunc = trunc i32 %arg1 to i8
117 %add = add nsw i8 %trunc, 1
118 %sextadd = sext i8 %add to i64
119 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
120 %res = load i8* %arrayidx
124 ; Check that we do not promote truncate when we cannot determine all the
125 ; bits that are dropped.
126 ; CHECK-LABEL: @oneArgPromotionBlockTrunc2
127 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i16 %arg1 to i32
128 ; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 [[ARG1SEXT]] to i8
129 ; CHECK: [[ARG1SEXT64:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64
130 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT64]], 1
131 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
133 define i8 @oneArgPromotionBlockTrunc2(i16 %arg1, i8* %base) {
134 %sextarg1 = sext i16 %arg1 to i32
135 %trunc = trunc i32 %sextarg1 to i8
136 %add = add nsw i8 %trunc, 1
137 %sextadd = sext i8 %add to i64
138 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
139 %res = load i8* %arrayidx
143 ; Check that we are able to promote truncate when we know all the bits
145 ; CHECK-LABEL: @oneArgPromotionPassTruncKeepSExt
146 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i64
147 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
148 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
150 define i8 @oneArgPromotionPassTruncKeepSExt(i1 %arg1, i8* %base) {
151 %sextarg1 = sext i1 %arg1 to i32
152 %trunc = trunc i32 %sextarg1 to i8
153 %add = add nsw i8 %trunc, 1
154 %sextadd = sext i8 %add to i64
155 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
156 %res = load i8* %arrayidx
160 ; On X86 truncate are free. Check that we are able to promote the add
161 ; to be used as addressing mode and that we insert a truncate for the other
163 ; CHECK-LABEL: @oneArgPromotionTruncInsert
164 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64
165 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
166 ; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i64 [[PROMOTED]] to i8
167 ; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8* %base, i64 [[PROMOTED]]
168 ; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8* [[GEP]]
169 ; CHECK: add i8 [[LOAD]], [[TRUNC]]
171 define i8 @oneArgPromotionTruncInsert(i8 %arg1, i8* %base) {
172 %add = add nsw i8 %arg1, 1
173 %sextadd = sext i8 %add to i64
174 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
175 %res = load i8* %arrayidx
176 %finalres = add i8 %res, %add
180 ; Cannot sext from a larger type than the promoted type.
181 ; CHECK-LABEL: @oneArgPromotionLargerType
182 ; CHECK: [[ARG1TRUNC:%[a-zA-Z_0-9-]+]] = trunc i128 %arg1 to i8
183 ; CHECK: [[ARG1SEXT64:%[a-zA-Z_0-9-]+]] = sext i8 [[ARG1TRUNC]] to i64
184 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT64]], 1
185 ; CHECK: getelementptr inbounds i8* %base, i64 [[PROMOTED]]
187 define i8 @oneArgPromotionLargerType(i128 %arg1, i8* %base) {
188 %trunc = trunc i128 %arg1 to i8
189 %add = add nsw i8 %trunc, 1
190 %sextadd = sext i8 %add to i64
191 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
192 %res = load i8* %arrayidx
193 %finalres = add i8 %res, %add
197 ; Use same inserted trunc
198 ; On X86 truncate are free. Check that we are able to promote the add
199 ; to be used as addressing mode and that we insert a truncate for
200 ; *all* the other uses.
201 ; CHECK-LABEL: @oneArgPromotionTruncInsertSeveralUse
202 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64
203 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
204 ; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i64 [[PROMOTED]] to i8
205 ; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8* %base, i64 [[PROMOTED]]
206 ; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8* [[GEP]]
207 ; CHECK: [[ADDRES:%[a-zA-Z_0-9-]+]] = add i8 [[LOAD]], [[TRUNC]]
208 ; CHECK: add i8 [[ADDRES]], [[TRUNC]]
210 define i8 @oneArgPromotionTruncInsertSeveralUse(i8 %arg1, i8* %base) {
211 %add = add nsw i8 %arg1, 1
212 %sextadd = sext i8 %add to i64
213 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
214 %res = load i8* %arrayidx
215 %almostfinalres = add i8 %res, %add
216 %finalres = add i8 %almostfinalres, %add
220 ; Check that the promoted instruction is used for all uses of the original
222 ; CHECK-LABEL: @oneArgPromotionSExtSeveralUse
223 ; CHECK: [[ARG1SEXT:%[a-zA-Z_0-9-]+]] = sext i8 %arg1 to i64
224 ; CHECK: [[PROMOTED:%[a-zA-Z_0-9-]+]] = add nsw i64 [[ARG1SEXT]], 1
225 ; CHECK: [[GEP:%[a-zA-Z_0-9-]+]] = getelementptr inbounds i8* %base, i64 [[PROMOTED]]
226 ; CHECK: [[LOAD:%[a-zA-Z_0-9-]+]] = load i8* [[GEP]]
227 ; CHECK: [[ADDRES:%[a-zA-Z_0-9-]+]] = zext i8 [[LOAD]] to i64
228 ; CHECK: add i64 [[ADDRES]], [[PROMOTED]]
230 define i64 @oneArgPromotionSExtSeveralUse(i8 %arg1, i8* %base) {
231 %add = add nsw i8 %arg1, 1
232 %sextadd = sext i8 %add to i64
233 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
234 %res = load i8* %arrayidx
235 %almostfinalres = zext i8 %res to i64
236 %finalres = add i64 %almostfinalres, %sextadd
240 ; Check all types of rollback mechanism.
241 ; For this test, the sign extension stays in place.
242 ; However, the matching process goes until promoting both the operands
243 ; of the first promotable add implies.
244 ; At this point the rollback mechanism kicks in and restores the states
245 ; until the addressing mode matcher is able to match something: in that
246 ; case promote nothing.
247 ; Along the way, the promotion mechanism involves:
248 ; - Mutating the type of %promotableadd1 and %promotableadd2.
249 ; - Creating a sext for %arg1 and %arg2.
250 ; - Creating a trunc for a use of %promotableadd1.
251 ; - Replacing a bunch of uses.
252 ; - Setting the operands of the promoted instruction with the promoted values.
253 ; - Moving instruction around (mainly sext when promoting instruction).
254 ; Each type of those promotions has to be undo at least once during this
256 ; CHECK-LABEL: @twoArgsPromotionNest
257 ; CHECK: [[ORIG:%[a-zA-Z_0-9-]+]] = add nsw i32 %arg1, %arg2
258 ; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 [[ORIG]], [[ORIG]]
259 ; CHECK: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i32 [[ADD]] to i64
260 ; CHECK: getelementptr inbounds i8* %base, i64 [[SEXT]]
262 define i8 @twoArgsPromotionNest(i32 %arg1, i32 %arg2, i8* %base) {
263 %promotableadd1 = add nsw i32 %arg1, %arg2
264 %promotableadd2 = add nsw i32 %promotableadd1, %promotableadd1
265 %sextadd = sext i32 %promotableadd2 to i64
266 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
267 %res = load i8* %arrayidx
271 ; Test the InstructionRemover undo, which was the only one not
272 ; kicked in the previous test.
273 ; The matcher first promotes the add, removes the trunc and promotes
275 ; Then, the matcher cannot use an addressing mode r + r + r, thus it
277 ; CHECK-LABEL: @twoArgsNoPromotionRemove
278 ; CHECK: [[SEXTARG1:%[a-zA-Z_0-9-]+]] = sext i1 %arg1 to i32
279 ; CHECK: [[TRUNC:%[a-zA-Z_0-9-]+]] = trunc i32 [[SEXTARG1]] to i8
280 ; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i8 [[TRUNC]], %arg2
281 ; CHECK: [[SEXT:%[a-zA-Z_0-9-]+]] = sext i8 [[ADD]] to i64
282 ; CHECK: getelementptr inbounds i8* %base, i64 [[SEXT]]
284 define i8 @twoArgsNoPromotionRemove(i1 %arg1, i8 %arg2, i8* %base) {
285 %sextarg1 = sext i1 %arg1 to i32
286 %trunc = trunc i32 %sextarg1 to i8
287 %add = add nsw i8 %trunc, %arg2
288 %sextadd = sext i8 %add to i64
289 %arrayidx = getelementptr inbounds i8* %base, i64 %sextadd
290 %res = load i8* %arrayidx
294 ; Ensure that when the profitability checks kicks in, the IR is not modified
295 ; will IgnoreProfitability is on.
296 ; The profitabily check happens when a candidate instruction has several uses.
297 ; The matcher will create a new matcher for each use and check if the
298 ; instruction is in the list of the matched instructions of this new matcher.
299 ; All changes made by the new matchers must be dropped before pursuing
300 ; otherwise the state of the original matcher will be wrong.
302 ; Without the profitability check, when checking for the second use of
303 ; arrayidx, the matcher promotes everything all the way to %arg1, %arg2.
304 ; Check that we did not promote anything in the final matching.
306 ; <rdar://problem/16020230>
307 ; CHECK-LABEL: @checkProfitability
308 ; CHECK-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg1 to i64
309 ; CHECK-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg2 to i64
310 ; CHECK: [[SHL:%[a-zA-Z_0-9-]+]] = shl nsw i32 %arg1, 1
311 ; CHECK: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 [[SHL]], %arg2
312 ; CHECK: [[SEXTADD:%[a-zA-Z_0-9-]+]] = sext i32 [[ADD]] to i64
314 ; CHECK: [[BASE1:%[a-zA-Z_0-9-]+]] = add i64 [[SEXTADD]], 48
315 ; CHECK: [[ADDR1:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[BASE1]] to i32*
316 ; CHECK: load i32* [[ADDR1]]
318 ; CHECK: [[BASE2:%[a-zA-Z_0-9-]+]] = add i64 [[SEXTADD]], 48
319 ; CHECK: [[ADDR2:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[BASE2]] to i32*
320 ; CHECK: load i32* [[ADDR2]]
322 ; CHECK-GEP-LABEL: @checkProfitability
323 ; CHECK-GEP-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg1 to i64
324 ; CHECK-GEP-NOT: {{%[a-zA-Z_0-9-]+}} = sext i32 %arg2 to i64
325 ; CHECK-GEP: [[SHL:%[a-zA-Z_0-9-]+]] = shl nsw i32 %arg1, 1
326 ; CHECK-GEP: [[ADD:%[a-zA-Z_0-9-]+]] = add nsw i32 [[SHL]], %arg2
327 ; CHECK-GEP: [[SEXTADD:%[a-zA-Z_0-9-]+]] = sext i32 [[ADD]] to i64
329 ; CHECK-GEP: [[BASE1:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[SEXTADD]] to i32*
330 ; CHECK-GEP: [[BCC1:%[a-zA-Z_0-9-]+]] = bitcast i32* [[BASE1]] to i8*
331 ; CHECK-GEP: [[FULL1:%[a-zA-Z_0-9-]+]] = getelementptr i8* [[BCC1]], i64 48
332 ; CHECK-GEP: [[ADDR1:%[a-zA-Z_0-9-]+]] = bitcast i8* [[FULL1]] to i32*
333 ; CHECK-GEP: load i32* [[ADDR1]]
335 ; CHECK-GEP: [[BASE2:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[SEXTADD]] to i32*
336 ; CHECK-GEP: [[BCC2:%[a-zA-Z_0-9-]+]] = bitcast i32* [[BASE2]] to i8*
337 ; CHECK-GEP: [[FULL2:%[a-zA-Z_0-9-]+]] = getelementptr i8* [[BCC2]], i64 48
338 ; CHECK-GEP: [[ADDR2:%[a-zA-Z_0-9-]+]] = bitcast i8* [[FULL2]] to i32*
339 ; CHECK-GEP: load i32* [[ADDR2]]
341 define i32 @checkProfitability(i32 %arg1, i32 %arg2, i1 %test) {
342 %shl = shl nsw i32 %arg1, 1
343 %add1 = add nsw i32 %shl, %arg2
344 %sextidx1 = sext i32 %add1 to i64
345 %tmpptr = inttoptr i64 %sextidx1 to i32*
346 %arrayidx1 = getelementptr i32* %tmpptr, i64 12
347 br i1 %test, label %then, label %else
349 %res1 = load i32* %arrayidx1
352 %res2 = load i32* %arrayidx1
355 %tmp = phi i32 [%res1, %then], [%res2, %else]
356 %res = add i32 %tmp, %add1
357 %addr = inttoptr i32 %res to i32*
358 %final = load i32* %addr
362 %struct.dns_packet = type { i32, i32, %union.anon }
363 %union.anon = type { i32 }
365 @a = common global i32 0, align 4
366 @b = common global i16 0, align 2
368 ; We used to crash on this function because we did not return the right
369 ; promoted instruction for %conv.i.
370 ; Make sure we generate the right code now.
372 ; %conv.i is used twice and only one of its use is being promoted.
373 ; Use it at the starting point for the matching.
374 ; CHECK: %conv.i = zext i16 [[PLAIN_OPND:%[.a-zA-Z_0-9-]+]] to i32
375 ; CHECK-NEXT: [[PROMOTED_CONV:%[.a-zA-Z_0-9-]+]] = zext i16 [[PLAIN_OPND]] to i64
376 ; CHECK-NEXT: [[BASE:%[a-zA-Z_0-9-]+]] = ptrtoint %struct.dns_packet* %P to i64
377 ; CHECK-NEXT: [[ADD:%[a-zA-Z_0-9-]+]] = add i64 [[BASE]], [[PROMOTED_CONV]]
378 ; CHECK-NEXT: [[ADDR:%[a-zA-Z_0-9-]+]] = add i64 [[ADD]], 7
379 ; CHECK-NEXT: [[CAST:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[ADDR]] to i8*
380 ; CHECK-NEXT: load i8* [[CAST]], align 1
381 define signext i16 @fn3(%struct.dns_packet* nocapture readonly %P) {
383 %tmp = getelementptr inbounds %struct.dns_packet* %P, i64 0, i32 2
384 %data.i.i = bitcast %union.anon* %tmp to [0 x i8]*
385 br label %while.body.i.i
387 while.body.i.i: ; preds = %while.body.i.i, %entry
388 %src.addr.0.i.i = phi i16 [ 0, %entry ], [ %inc.i.i, %while.body.i.i ]
389 %inc.i.i = add i16 %src.addr.0.i.i, 1
390 %idxprom.i.i = sext i16 %src.addr.0.i.i to i64
391 %arrayidx.i.i = getelementptr inbounds [0 x i8]* %data.i.i, i64 0, i64 %idxprom.i.i
392 %tmp1 = load i8* %arrayidx.i.i, align 1
393 %conv2.i.i = zext i8 %tmp1 to i32
394 %and.i.i = and i32 %conv2.i.i, 15
395 store i32 %and.i.i, i32* @a, align 4
396 %tobool.i.i = icmp eq i32 %and.i.i, 0
397 br i1 %tobool.i.i, label %while.body.i.i, label %fn1.exit.i
399 fn1.exit.i: ; preds = %while.body.i.i
400 %inc.i.i.lcssa = phi i16 [ %inc.i.i, %while.body.i.i ]
401 %conv.i = zext i16 %inc.i.i.lcssa to i32
402 %sub.i = add nsw i32 %conv.i, -1
403 %idxprom.i = sext i32 %sub.i to i64
404 %arrayidx.i = getelementptr inbounds [0 x i8]* %data.i.i, i64 0, i64 %idxprom.i
405 %tmp2 = load i8* %arrayidx.i, align 1
406 %conv2.i = sext i8 %tmp2 to i16
407 store i16 %conv2.i, i16* @b, align 2
408 %sub4.i = sub nsw i32 0, %conv.i
409 %conv5.i = zext i16 %conv2.i to i32
410 %cmp.i = icmp sgt i32 %conv5.i, %sub4.i
411 br i1 %cmp.i, label %if.then.i, label %fn2.exit
413 if.then.i: ; preds = %fn1.exit.i
414 %end.i = getelementptr inbounds %struct.dns_packet* %P, i64 0, i32 1
415 %tmp3 = load i32* %end.i, align 4
416 %sub7.i = add i32 %tmp3, 65535
417 %conv8.i = trunc i32 %sub7.i to i16
420 fn2.exit: ; preds = %if.then.i, %fn1.exit.i
421 %retval.0.i = phi i16 [ %conv8.i, %if.then.i ], [ undef, %fn1.exit.i ]