1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
3 declare i32 @llvm.x86.avx512.kortestz(i16, i16) nounwind readnone
7 define i32 @test_kortestz(i16 %a0, i16 %a1) {
8 %res = call i32 @llvm.x86.avx512.kortestz(i16 %a0, i16 %a1)
12 declare i32 @llvm.x86.avx512.kortestc(i16, i16) nounwind readnone
13 ; CHECK: test_kortestc
16 define i32 @test_kortestc(i16 %a0, i16 %a1) {
17 %res = call i32 @llvm.x86.avx512.kortestc(i16 %a0, i16 %a1)
21 define <16 x float> @test_rcp_ps_512(<16 x float> %a0) {
23 %res = call <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
26 declare <16 x float> @llvm.x86.avx512.rcp14.ps.512(<16 x float>) nounwind readnone
28 define <8 x double> @test_rcp_pd_512(<8 x double> %a0) {
30 %res = call <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double> %a0) ; <<8 x double>> [#uses=1]
33 declare <8 x double> @llvm.x86.avx512.rcp14.pd.512(<8 x double>) nounwind readnone
35 define <16 x float> @test_rcp28_ps_512(<16 x float> %a0) {
37 %res = call <16 x float> @llvm.x86.avx512.rcp28.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
40 declare <16 x float> @llvm.x86.avx512.rcp28.ps.512(<16 x float>) nounwind readnone
42 define <8 x double> @test_rcp28_pd_512(<8 x double> %a0) {
44 %res = call <8 x double> @llvm.x86.avx512.rcp28.pd.512(<8 x double> %a0) ; <<8 x double>> [#uses=1]
47 declare <8 x double> @llvm.x86.avx512.rcp28.pd.512(<8 x double>) nounwind readnone
49 define <8 x double> @test_rndscale_pd_512(<8 x double> %a0) {
51 %res = call <8 x double> @llvm.x86.avx512.rndscale.pd.512(<8 x double> %a0, i32 7) ; <<8 x double>> [#uses=1]
54 declare <8 x double> @llvm.x86.avx512.rndscale.pd.512(<8 x double>, i32) nounwind readnone
57 define <16 x float> @test_rndscale_ps_512(<16 x float> %a0) {
59 %res = call <16 x float> @llvm.x86.avx512.rndscale.ps.512(<16 x float> %a0, i32 7) ; <<16 x float>> [#uses=1]
62 declare <16 x float> @llvm.x86.avx512.rndscale.ps.512(<16 x float>, i32) nounwind readnone
65 define <16 x float> @test_rsqrt_ps_512(<16 x float> %a0) {
67 %res = call <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
70 declare <16 x float> @llvm.x86.avx512.rsqrt14.ps.512(<16 x float>) nounwind readnone
72 define <16 x float> @test_rsqrt28_ps_512(<16 x float> %a0) {
74 %res = call <16 x float> @llvm.x86.avx512.rsqrt28.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
77 declare <16 x float> @llvm.x86.avx512.rsqrt28.ps.512(<16 x float>) nounwind readnone
79 define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {
81 %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
84 declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>) nounwind readnone
86 define <4 x float> @test_rsqrt28_ss(<4 x float> %a0) {
88 %res = call <4 x float> @llvm.x86.avx512.rsqrt28.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
91 declare <4 x float> @llvm.x86.avx512.rsqrt28.ss(<4 x float>) nounwind readnone
93 define <4 x float> @test_rcp14_ss(<4 x float> %a0) {
95 %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
98 declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>) nounwind readnone
100 define <4 x float> @test_rcp28_ss(<4 x float> %a0) {
102 %res = call <4 x float> @llvm.x86.avx512.rcp28.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
105 declare <4 x float> @llvm.x86.avx512.rcp28.ss(<4 x float>) nounwind readnone
107 define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {
109 %res = call <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double> %a0) ; <<8 x double>> [#uses=1]
110 ret <8 x double> %res
112 declare <8 x double> @llvm.x86.avx512.sqrt.pd.512(<8 x double>) nounwind readnone
114 define <16 x float> @test_sqrt_ps_512(<16 x float> %a0) {
116 %res = call <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float> %a0) ; <<16 x float>> [#uses=1]
117 ret <16 x float> %res
119 declare <16 x float> @llvm.x86.avx512.sqrt.ps.512(<16 x float>) nounwind readnone
121 define <4 x float> @test_sqrt_ss(<4 x float> %a0, <4 x float> %a1) {
123 %res = call <4 x float> @llvm.x86.avx512.sqrt.ss(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1]
126 declare <4 x float> @llvm.x86.avx512.sqrt.ss(<4 x float>, <4 x float>) nounwind readnone
128 define <2 x double> @test_sqrt_sd(<2 x double> %a0, <2 x double> %a1) {
130 %res = call <2 x double> @llvm.x86.avx512.sqrt.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1]
131 ret <2 x double> %res
133 declare <2 x double> @llvm.x86.avx512.sqrt.sd(<2 x double>, <2 x double>) nounwind readnone
135 define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
137 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
140 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
142 define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
144 %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
145 ret <2 x double> %res
147 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
149 define <2 x double> @test_x86_avx512_cvtusi642sd(<2 x double> %a0, i64 %a1) {
150 ; CHECK: vcvtusi2sdqz
151 %res = call <2 x double> @llvm.x86.avx512.cvtusi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
152 ret <2 x double> %res
154 declare <2 x double> @llvm.x86.avx512.cvtusi642sd(<2 x double>, i64) nounwind readnone
156 define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) {
158 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1]
161 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
164 define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
166 %res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) ; <i64> [#uses=1]
169 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
172 define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
174 %res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]
177 declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
180 define i64 @test_x86_sse_cvttss2si64(<4 x float> %a0) {
182 %res = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0) ; <i64> [#uses=1]
185 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
187 define i64 @test_x86_avx512_cvtsd2usi64(<2 x double> %a0) {
189 %res = call i64 @llvm.x86.avx512.cvtsd2usi64(<2 x double> %a0) ; <i64> [#uses=1]
192 declare i64 @llvm.x86.avx512.cvtsd2usi64(<2 x double>) nounwind readnone