1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3 declare <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8>, <4 x i8>)
5 define <4 x i8> @test_uabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
6 ; CHECK-LABEL: test_uabsdiff_v4i8_expand
11 ; CHECK-DAG: movd %xmm1, [[SRC:%.*]]
12 ; CHECK-DAG: movd %xmm0, [[DST:%.*]]
13 ; CHECK: subl [[SRC]], [[DST]]
21 %1 = call <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
25 declare <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8>, <4 x i8>)
27 define <4 x i8> @test_sabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
28 ; CHECK-LABEL: test_sabsdiff_v4i8_expand
33 ; CHECK-DAG: psubd {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
34 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
35 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
36 ; CHECK: por [[SRC2]], [[DST]]
39 %1 = call <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
43 declare <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8>, <8 x i8>)
45 define <8 x i8> @test_sabsdiff_v8i8_expand(<8 x i8> %a1, <8 x i8> %a2) {
46 ; CHECK-LABEL: test_sabsdiff_v8i8_expand
51 ; CHECK-DAG: psubw {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
52 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
53 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
54 ; CHECK: por [[SRC2]], [[DST]]
57 %1 = call <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8> %a1, <8 x i8> %a2)
61 declare <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8>, <16 x i8>)
63 define <16 x i8> @test_uabsdiff_v16i8_expand(<16 x i8> %a1, <16 x i8> %a2) {
64 ; CHECK-LABEL: test_uabsdiff_v16i8_expand
72 %1 = call <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8> %a1, <16 x i8> %a2)
76 declare <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16>, <8 x i16>)
78 define <8 x i16> @test_uabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
79 ; CHECK-LABEL: test_uabsdiff_v8i16_expand
86 %1 = call <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
90 declare <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16>, <8 x i16>)
92 define <8 x i16> @test_sabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
93 ; CHECK-LABEL: test_sabsdiff_v8i16_expand
98 ; CHECK-DAG: psubw {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
99 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
100 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
101 ; CHECK: por [[SRC2]], [[DST]]
104 %1 = call <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
108 declare <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32>, <4 x i32>)
110 define <4 x i32> @test_sabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
111 ; CHECK-LABEL: test_sabsdiff_v4i32_expand
116 ; CHECK-DAG: psubd {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
117 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
118 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
119 ; CHECK: por [[SRC2]], [[DST]]
121 %1 = call <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
125 declare <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32>, <4 x i32>)
127 define <4 x i32> @test_uabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
128 ; CHECK-LABEL: test_uabsdiff_v4i32_expand
133 ; CHECK-DAG: movd %xmm1, [[SRC:%.*]]
134 ; CHECK-DAG: movd %xmm0, [[DST:%.*]]
135 ; CHECK: subl [[SRC]], [[DST]]
143 %1 = call <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
147 declare <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32>, <2 x i32>)
149 define <2 x i32> @test_sabsdiff_v2i32_expand(<2 x i32> %a1, <2 x i32> %a2) {
150 ; CHECK-LABEL: test_sabsdiff_v2i32_expand
155 ; CHECK-DAG: psubq {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
156 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
157 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
158 ; CHECK: por [[SRC2]], [[DST]]
161 %1 = call <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32> %a1, <2 x i32> %a2)
165 declare <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64>, <2 x i64>)
167 define <2 x i64> @test_sabsdiff_v2i64_expand(<2 x i64> %a1, <2 x i64> %a2) {
168 ; CHECK-LABEL: test_sabsdiff_v2i64_expand
173 ; CHECK-DAG: psubq {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
174 ; CHECK-DAG: pandn {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
175 ; CHECK-DAG: pandn [[SRC1]], [[DST:%xmm[0-9]+]]
176 ; CHECK: por [[SRC2]], [[DST]]
179 %1 = call <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64> %a1, <2 x i64> %a2)