1 ; Test compound shifts.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Test a shift right followed by a sign extension. This can use two shifts.
6 define i64 @f1(i32 %a) {
8 ; CHECK: sllg [[REG:%r[0-5]]], %r2, 62
9 ; CHECK: srag %r2, [[REG]], 63
12 %trunc = trunc i32 %shr to i1
13 %ext = sext i1 %trunc to i64
17 ; ...and again with the highest shift count.
18 define i64 @f2(i32 %a) {
20 ; CHECK: sllg [[REG:%r[0-5]]], %r2, 32
21 ; CHECK: srag %r2, [[REG]], 63
23 %shr = lshr i32 %a, 31
24 %trunc = trunc i32 %shr to i1
25 %ext = sext i1 %trunc to i64
29 ; Test a left shift that of an extended right shift in a case where folding
31 define i64 @f3(i32 %a) {
33 ; CHECK: risbg %r2, %r2, 27, 181, 9
36 %ext = zext i32 %shr to i64
37 %shl = shl i64 %ext, 10
38 %and = and i64 %shl, 137438952960
42 ; ...and again with a larger right shift.
43 define i64 @f4(i32 %a) {
45 ; CHECK: risbg %r2, %r2, 30, 158, 3
47 %shr = lshr i32 %a, 30
48 %ext = sext i32 %shr to i64
49 %shl = shl i64 %ext, 33
50 %and = and i64 %shl, 8589934592
54 ; Repeat the previous test in a case where all bits outside the
56 define i64 @f5(i32 %a) {
58 ; CHECK: risbg %r2, %r2, 29, 158, 3
61 %shr = lshr i32 %a, 30
62 %ext = sext i32 %shr to i64
63 %shl = shl i64 %ext, 33
68 ; Test that SRA gets replaced with SRL if the sign bit is the only one
70 define i64 @f6(i64 %a) {
72 ; CHECK: risbg %r2, %r2, 55, 183, 19
75 %shr = ashr i64 %shl, 60
76 %and = and i64 %shr, 256