1 ; Test 32-bit GPR accesses to a PC-relative location.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
9 @gsrc16u = global i16 1, align 1, section "foo"
10 @gsrc32u = global i32 1, align 2, section "foo"
11 @gdst16u = global i16 2, align 1, section "foo"
12 @gdst32u = global i32 2, align 2, section "foo"
14 ; Check sign-extending loads from i16.
17 ; CHECK: lhrl %r2, gsrc16
19 %val = load i16 *@gsrc16
20 %ext = sext i16 %val to i32
24 ; Check zero-extending loads from i16.
27 ; CHECK: llhrl %r2, gsrc16
29 %val = load i16 *@gsrc16
30 %ext = zext i16 %val to i32
34 ; Check truncating 16-bit stores.
35 define void @f3(i32 %val) {
37 ; CHECK: sthrl %r2, gdst16
39 %half = trunc i32 %val to i16
40 store i16 %half, i16 *@gdst16
44 ; Check plain loads and stores.
47 ; CHECK: lrl %r0, gsrc32
48 ; CHECK: strl %r0, gdst32
50 %val = load i32 *@gsrc32
51 store i32 %val, i32 *@gdst32
55 ; Repeat f1 with an unaligned variable.
58 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
59 ; CHECK: lh %r2, 0([[REG]])
61 %val = load i16 *@gsrc16u, align 1
62 %ext = sext i16 %val to i32
66 ; Repeat f2 with an unaligned variable.
69 ; CHECK: lgrl [[REG:%r[0-5]]], gsrc16u
70 ; CHECK: llh %r2, 0([[REG]])
72 %val = load i16 *@gsrc16u, align 1
73 %ext = zext i16 %val to i32
77 ; Repeat f3 with an unaligned variable.
78 define void @f7(i32 %val) {
80 ; CHECK: lgrl [[REG:%r[0-5]]], gdst16u
81 ; CHECK: sth %r2, 0([[REG]])
83 %half = trunc i32 %val to i16
84 store i16 %half, i16 *@gdst16u, align 1
88 ; Repeat f4 with unaligned variables.
91 ; CHECK: larl [[REG:%r[0-5]]], gsrc32u
92 ; CHECK: l [[VAL:%r[0-5]]], 0([[REG]])
93 ; CHECK: larl [[REG:%r[0-5]]], gdst32u
94 ; CHECK: st [[VAL]], 0([[REG]])
96 %val = load i32 *@gsrc32u, align 2
97 store i32 %val, i32 *@gdst32u, align 2