1 ; Test 128-bit addition in which the second operand is variable.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
7 ; Test register addition.
8 define void @f1(i128 *%ptr) {
13 %value = load i128 *%ptr
14 %add = add i128 %value, %value
15 store i128 %add, i128 *%ptr
19 ; Test memory addition with no offset. Making the load of %a volatile
20 ; should force the memory operand to be %b.
21 define void @f2(i128 *%aptr, i64 %addr) {
23 ; CHECK: alg {{%r[0-5]}}, 8(%r3)
24 ; CHECK: alcg {{%r[0-5]}}, 0(%r3)
26 %bptr = inttoptr i64 %addr to i128 *
27 %a = load volatile i128 *%aptr
29 %add = add i128 %a, %b
30 store i128 %add, i128 *%aptr
34 ; Test the highest aligned offset that is in range of both ALG and ALCG.
35 define void @f3(i128 *%aptr, i64 %base) {
37 ; CHECK: alg {{%r[0-5]}}, 524280(%r3)
38 ; CHECK: alcg {{%r[0-5]}}, 524272(%r3)
40 %addr = add i64 %base, 524272
41 %bptr = inttoptr i64 %addr to i128 *
42 %a = load volatile i128 *%aptr
44 %add = add i128 %a, %b
45 store i128 %add, i128 *%aptr
49 ; Test the next doubleword up, which requires separate address logic for ALG.
50 define void @f4(i128 *%aptr, i64 %base) {
52 ; CHECK: lgr [[BASE:%r[1-5]]], %r3
53 ; CHECK: agfi [[BASE]], 524288
54 ; CHECK: alg {{%r[0-5]}}, 0([[BASE]])
55 ; CHECK: alcg {{%r[0-5]}}, 524280(%r3)
57 %addr = add i64 %base, 524280
58 %bptr = inttoptr i64 %addr to i128 *
59 %a = load volatile i128 *%aptr
61 %add = add i128 %a, %b
62 store i128 %add, i128 *%aptr
66 ; Test the next doubleword after that, which requires separate logic for
67 ; both instructions. It would be better to create an anchor at 524288
68 ; that both instructions can use, but that isn't implemented yet.
69 define void @f5(i128 *%aptr, i64 %base) {
71 ; CHECK: alg {{%r[0-5]}}, 0({{%r[1-5]}})
72 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
74 %addr = add i64 %base, 524288
75 %bptr = inttoptr i64 %addr to i128 *
76 %a = load volatile i128 *%aptr
78 %add = add i128 %a, %b
79 store i128 %add, i128 *%aptr
83 ; Test the lowest displacement that is in range of both ALG and ALCG.
84 define void @f6(i128 *%aptr, i64 %base) {
86 ; CHECK: alg {{%r[0-5]}}, -524280(%r3)
87 ; CHECK: alcg {{%r[0-5]}}, -524288(%r3)
89 %addr = add i64 %base, -524288
90 %bptr = inttoptr i64 %addr to i128 *
91 %a = load volatile i128 *%aptr
93 %add = add i128 %a, %b
94 store i128 %add, i128 *%aptr
98 ; Test the next doubleword down, which is out of range of the ALCG.
99 define void @f7(i128 *%aptr, i64 %base) {
101 ; CHECK: alg {{%r[0-5]}}, -524288(%r3)
102 ; CHECK: alcg {{%r[0-5]}}, 0({{%r[1-5]}})
104 %addr = add i64 %base, -524296
105 %bptr = inttoptr i64 %addr to i128 *
106 %a = load volatile i128 *%aptr
107 %b = load i128 *%bptr
108 %add = add i128 %a, %b
109 store i128 %add, i128 *%aptr
113 ; Check that additions of spilled values can use ALG and ALCG rather than
115 define void @f8(i128 *%ptr0) {
117 ; CHECK: brasl %r14, foo@PLT
118 ; CHECK: alg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
119 ; CHECK: alcg {{%r[0-9]+}}, {{[0-9]+}}(%r15)
121 %ptr1 = getelementptr i128 *%ptr0, i128 2
122 %ptr2 = getelementptr i128 *%ptr0, i128 4
123 %ptr3 = getelementptr i128 *%ptr0, i128 6
124 %ptr4 = getelementptr i128 *%ptr0, i128 8
126 %val0 = load i128 *%ptr0
127 %val1 = load i128 *%ptr1
128 %val2 = load i128 *%ptr2
129 %val3 = load i128 *%ptr3
130 %val4 = load i128 *%ptr4
132 %retptr = call i128 *@foo()
134 %ret = load i128 *%retptr
135 %add0 = add i128 %ret, %val0
136 %add1 = add i128 %add0, %val1
137 %add2 = add i128 %add1, %val2
138 %add3 = add i128 %add2, %val3
139 %add4 = add i128 %add3, %val4
140 store i128 %add4, i128 *%retptr