1 ; Test 32-bit floating-point addition.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 ; Check register addition.
6 define float @f1(float %f1, float %f2) {
10 %res = fadd float %f1, %f2
14 ; Check the low end of the AEB range.
15 define float @f2(float %f1, float *%ptr) {
17 ; CHECK: aeb %f0, 0(%r2)
19 %f2 = load float *%ptr
20 %res = fadd float %f1, %f2
24 ; Check the high end of the aligned AEB range.
25 define float @f3(float %f1, float *%base) {
27 ; CHECK: aeb %f0, 4092(%r2)
29 %ptr = getelementptr float *%base, i64 1023
30 %f2 = load float *%ptr
31 %res = fadd float %f1, %f2
35 ; Check the next word up, which needs separate address logic.
36 ; Other sequences besides this one would be OK.
37 define float @f4(float %f1, float *%base) {
39 ; CHECK: aghi %r2, 4096
40 ; CHECK: aeb %f0, 0(%r2)
42 %ptr = getelementptr float *%base, i64 1024
43 %f2 = load float *%ptr
44 %res = fadd float %f1, %f2
48 ; Check negative displacements, which also need separate address logic.
49 define float @f5(float %f1, float *%base) {
52 ; CHECK: aeb %f0, 0(%r2)
54 %ptr = getelementptr float *%base, i64 -1
55 %f2 = load float *%ptr
56 %res = fadd float %f1, %f2
60 ; Check that AEB allows indices.
61 define float @f6(float %f1, float *%base, i64 %index) {
63 ; CHECK: sllg %r1, %r3, 2
64 ; CHECK: aeb %f0, 400(%r1,%r2)
66 %ptr1 = getelementptr float *%base, i64 %index
67 %ptr2 = getelementptr float *%ptr1, i64 100
68 %f2 = load float *%ptr2
69 %res = fadd float %f1, %f2