1 ; Test 16-bit conditional stores that are presented as selects.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5 declare void @foo(i16 *)
7 ; Test the simple case, with the loaded value first.
8 define void @f1(i16 *%ptr, i16 %alt, i32 %limit) {
11 ; CHECK: jl [[LABEL:[^ ]*]]
13 ; CHECK: sth %r3, 0(%r2)
16 %cond = icmp ult i32 %limit, 420
17 %orig = load i16 *%ptr
18 %res = select i1 %cond, i16 %orig, i16 %alt
19 store i16 %res, i16 *%ptr
23 ; ...and with the loaded value second
24 define void @f2(i16 *%ptr, i16 %alt, i32 %limit) {
27 ; CHECK: jhe [[LABEL:[^ ]*]]
29 ; CHECK: sth %r3, 0(%r2)
32 %cond = icmp ult i32 %limit, 420
33 %orig = load i16 *%ptr
34 %res = select i1 %cond, i16 %alt, i16 %orig
35 store i16 %res, i16 *%ptr
39 ; Test cases where the value is explicitly sign-extended to 32 bits, with the
41 define void @f3(i16 *%ptr, i32 %alt, i32 %limit) {
44 ; CHECK: jl [[LABEL:[^ ]*]]
46 ; CHECK: sth %r3, 0(%r2)
49 %cond = icmp ult i32 %limit, 420
50 %orig = load i16 *%ptr
51 %ext = sext i16 %orig to i32
52 %res = select i1 %cond, i32 %ext, i32 %alt
53 %trunc = trunc i32 %res to i16
54 store i16 %trunc, i16 *%ptr
58 ; ...and with the loaded value second
59 define void @f4(i16 *%ptr, i32 %alt, i32 %limit) {
62 ; CHECK: jhe [[LABEL:[^ ]*]]
64 ; CHECK: sth %r3, 0(%r2)
67 %cond = icmp ult i32 %limit, 420
68 %orig = load i16 *%ptr
69 %ext = sext i16 %orig to i32
70 %res = select i1 %cond, i32 %alt, i32 %ext
71 %trunc = trunc i32 %res to i16
72 store i16 %trunc, i16 *%ptr
76 ; Test cases where the value is explicitly zero-extended to 32 bits, with the
78 define void @f5(i16 *%ptr, i32 %alt, i32 %limit) {
81 ; CHECK: jl [[LABEL:[^ ]*]]
83 ; CHECK: sth %r3, 0(%r2)
86 %cond = icmp ult i32 %limit, 420
87 %orig = load i16 *%ptr
88 %ext = zext i16 %orig to i32
89 %res = select i1 %cond, i32 %ext, i32 %alt
90 %trunc = trunc i32 %res to i16
91 store i16 %trunc, i16 *%ptr
95 ; ...and with the loaded value second
96 define void @f6(i16 *%ptr, i32 %alt, i32 %limit) {
99 ; CHECK: jhe [[LABEL:[^ ]*]]
101 ; CHECK: sth %r3, 0(%r2)
104 %cond = icmp ult i32 %limit, 420
105 %orig = load i16 *%ptr
106 %ext = zext i16 %orig to i32
107 %res = select i1 %cond, i32 %alt, i32 %ext
108 %trunc = trunc i32 %res to i16
109 store i16 %trunc, i16 *%ptr
113 ; Test cases where the value is explicitly sign-extended to 64 bits, with the
114 ; loaded value first.
115 define void @f7(i16 *%ptr, i64 %alt, i32 %limit) {
118 ; CHECK: jl [[LABEL:[^ ]*]]
120 ; CHECK: sth %r3, 0(%r2)
123 %cond = icmp ult i32 %limit, 420
124 %orig = load i16 *%ptr
125 %ext = sext i16 %orig to i64
126 %res = select i1 %cond, i64 %ext, i64 %alt
127 %trunc = trunc i64 %res to i16
128 store i16 %trunc, i16 *%ptr
132 ; ...and with the loaded value second
133 define void @f8(i16 *%ptr, i64 %alt, i32 %limit) {
136 ; CHECK: jhe [[LABEL:[^ ]*]]
138 ; CHECK: sth %r3, 0(%r2)
141 %cond = icmp ult i32 %limit, 420
142 %orig = load i16 *%ptr
143 %ext = sext i16 %orig to i64
144 %res = select i1 %cond, i64 %alt, i64 %ext
145 %trunc = trunc i64 %res to i16
146 store i16 %trunc, i16 *%ptr
150 ; Test cases where the value is explicitly zero-extended to 64 bits, with the
151 ; loaded value first.
152 define void @f9(i16 *%ptr, i64 %alt, i32 %limit) {
155 ; CHECK: jl [[LABEL:[^ ]*]]
157 ; CHECK: sth %r3, 0(%r2)
160 %cond = icmp ult i32 %limit, 420
161 %orig = load i16 *%ptr
162 %ext = zext i16 %orig to i64
163 %res = select i1 %cond, i64 %ext, i64 %alt
164 %trunc = trunc i64 %res to i16
165 store i16 %trunc, i16 *%ptr
169 ; ...and with the loaded value second
170 define void @f10(i16 *%ptr, i64 %alt, i32 %limit) {
173 ; CHECK: jhe [[LABEL:[^ ]*]]
175 ; CHECK: sth %r3, 0(%r2)
178 %cond = icmp ult i32 %limit, 420
179 %orig = load i16 *%ptr
180 %ext = zext i16 %orig to i64
181 %res = select i1 %cond, i64 %alt, i64 %ext
182 %trunc = trunc i64 %res to i16
183 store i16 %trunc, i16 *%ptr
187 ; Check the high end of the aligned STH range.
188 define void @f11(i16 *%base, i16 %alt, i32 %limit) {
191 ; CHECK: jl [[LABEL:[^ ]*]]
193 ; CHECK: sth %r3, 4094(%r2)
196 %ptr = getelementptr i16 *%base, i64 2047
197 %cond = icmp ult i32 %limit, 420
198 %orig = load i16 *%ptr
199 %res = select i1 %cond, i16 %orig, i16 %alt
200 store i16 %res, i16 *%ptr
204 ; Check the next halfword up, which should use STHY instead of STH.
205 define void @f12(i16 *%base, i16 %alt, i32 %limit) {
208 ; CHECK: jl [[LABEL:[^ ]*]]
210 ; CHECK: sthy %r3, 4096(%r2)
213 %ptr = getelementptr i16 *%base, i64 2048
214 %cond = icmp ult i32 %limit, 420
215 %orig = load i16 *%ptr
216 %res = select i1 %cond, i16 %orig, i16 %alt
217 store i16 %res, i16 *%ptr
221 ; Check the high end of the aligned STHY range.
222 define void @f13(i16 *%base, i16 %alt, i32 %limit) {
225 ; CHECK: jl [[LABEL:[^ ]*]]
227 ; CHECK: sthy %r3, 524286(%r2)
230 %ptr = getelementptr i16 *%base, i64 262143
231 %cond = icmp ult i32 %limit, 420
232 %orig = load i16 *%ptr
233 %res = select i1 %cond, i16 %orig, i16 %alt
234 store i16 %res, i16 *%ptr
238 ; Check the next halfword up, which needs separate address logic.
239 ; Other sequences besides this one would be OK.
240 define void @f14(i16 *%base, i16 %alt, i32 %limit) {
243 ; CHECK: jl [[LABEL:[^ ]*]]
245 ; CHECK: agfi %r2, 524288
246 ; CHECK: sth %r3, 0(%r2)
249 %ptr = getelementptr i16 *%base, i64 262144
250 %cond = icmp ult i32 %limit, 420
251 %orig = load i16 *%ptr
252 %res = select i1 %cond, i16 %orig, i16 %alt
253 store i16 %res, i16 *%ptr
257 ; Check the low end of the STHY range.
258 define void @f15(i16 *%base, i16 %alt, i32 %limit) {
261 ; CHECK: jl [[LABEL:[^ ]*]]
263 ; CHECK: sthy %r3, -524288(%r2)
266 %ptr = getelementptr i16 *%base, i64 -262144
267 %cond = icmp ult i32 %limit, 420
268 %orig = load i16 *%ptr
269 %res = select i1 %cond, i16 %orig, i16 %alt
270 store i16 %res, i16 *%ptr
274 ; Check the next halfword down, which needs separate address logic.
275 ; Other sequences besides this one would be OK.
276 define void @f16(i16 *%base, i16 %alt, i32 %limit) {
279 ; CHECK: jl [[LABEL:[^ ]*]]
281 ; CHECK: agfi %r2, -524290
282 ; CHECK: sth %r3, 0(%r2)
285 %ptr = getelementptr i16 *%base, i64 -262145
286 %cond = icmp ult i32 %limit, 420
287 %orig = load i16 *%ptr
288 %res = select i1 %cond, i16 %orig, i16 %alt
289 store i16 %res, i16 *%ptr
293 ; Check that STHY allows an index.
294 define void @f17(i64 %base, i64 %index, i16 %alt, i32 %limit) {
297 ; CHECK: jl [[LABEL:[^ ]*]]
299 ; CHECK: sthy %r4, 4096(%r3,%r2)
302 %add1 = add i64 %base, %index
303 %add2 = add i64 %add1, 4096
304 %ptr = inttoptr i64 %add2 to i16 *
305 %cond = icmp ult i32 %limit, 420
306 %orig = load i16 *%ptr
307 %res = select i1 %cond, i16 %orig, i16 %alt
308 store i16 %res, i16 *%ptr
312 ; Check that volatile loads are not matched.
313 define void @f18(i16 *%ptr, i16 %alt, i32 %limit) {
315 ; CHECK: lh {{%r[0-5]}}, 0(%r2)
316 ; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
318 ; CHECK: sth {{%r[0-5]}}, 0(%r2)
320 %cond = icmp ult i32 %limit, 420
321 %orig = load volatile i16 *%ptr
322 %res = select i1 %cond, i16 %orig, i16 %alt
323 store i16 %res, i16 *%ptr
327 ; ...likewise stores. In this case we should have a conditional load into %r3.
328 define void @f19(i16 *%ptr, i16 %alt, i32 %limit) {
330 ; CHECK: jhe [[LABEL:[^ ]*]]
331 ; CHECK: lh %r3, 0(%r2)
333 ; CHECK: sth %r3, 0(%r2)
335 %cond = icmp ult i32 %limit, 420
336 %orig = load i16 *%ptr
337 %res = select i1 %cond, i16 %orig, i16 %alt
338 store volatile i16 %res, i16 *%ptr
342 ; Check that atomic loads are not matched. The transformation is OK for
343 ; the "unordered" case tested here, but since we don't try to handle atomic
344 ; operations at all in this context, it seems better to assert that than
345 ; to restrict the test to a stronger ordering.
346 define void @f20(i16 *%ptr, i16 %alt, i32 %limit) {
347 ; FIXME: should use a normal load instead of CS.
349 ; CHECK: cs {{%r[0-9]+}},
351 ; CHECK: {{jl|jnl}} [[LABEL:[^ ]*]]
353 ; CHECK: sth {{%r[0-9]+}},
355 %cond = icmp ult i32 %limit, 420
356 %orig = load atomic i16 *%ptr unordered, align 2
357 %res = select i1 %cond, i16 %orig, i16 %alt
358 store i16 %res, i16 *%ptr
362 ; ...likewise stores.
363 define void @f21(i16 *%ptr, i16 %alt, i32 %limit) {
364 ; FIXME: should use a normal store instead of CS.
366 ; CHECK: jhe [[LABEL:[^ ]*]]
367 ; CHECK: lh %r3, 0(%r2)
369 ; CHECK: cs {{%r[0-9]+}},
371 %cond = icmp ult i32 %limit, 420
372 %orig = load i16 *%ptr
373 %res = select i1 %cond, i16 %orig, i16 %alt
374 store atomic i16 %res, i16 *%ptr unordered, align 2
378 ; Try a frame index base.
379 define void @f22(i16 %alt, i32 %limit) {
381 ; CHECK: brasl %r14, foo@PLT
383 ; CHECK: jl [[LABEL:[^ ]*]]
385 ; CHECK: sth {{%r[0-9]+}}, {{[0-9]+}}(%r15)
387 ; CHECK: brasl %r14, foo@PLT
390 call void @foo(i16 *%ptr)
391 %cond = icmp ult i32 %limit, 420
392 %orig = load i16 *%ptr
393 %res = select i1 %cond, i16 %orig, i16 %alt
394 store i16 %res, i16 *%ptr
395 call void @foo(i16 *%ptr)