1 ; Test 64-bit atomic minimum and maximum.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
6 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
8 ; CHECK: lg %r2, 0(%r3)
9 ; CHECK: [[LOOP:\.[^:]*]]:
10 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
11 ; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
12 ; CHECK: lgr [[NEW]], %r4
13 ; CHECK: csg %r2, [[NEW]], 0(%r3)
16 %res = atomicrmw min i64 *%src, i64 %b seq_cst
20 ; Check signed maximum.
21 define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
23 ; CHECK: lg %r2, 0(%r3)
24 ; CHECK: [[LOOP:\.[^:]*]]:
25 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
26 ; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
27 ; CHECK: lgr [[NEW]], %r4
28 ; CHECK: csg %r2, [[NEW]], 0(%r3)
31 %res = atomicrmw max i64 *%src, i64 %b seq_cst
35 ; Check unsigned minimum.
36 define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
38 ; CHECK: lg %r2, 0(%r3)
39 ; CHECK: [[LOOP:\.[^:]*]]:
40 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
41 ; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]]
42 ; CHECK: lgr [[NEW]], %r4
43 ; CHECK: csg %r2, [[NEW]], 0(%r3)
46 %res = atomicrmw umin i64 *%src, i64 %b seq_cst
50 ; Check unsigned maximum.
51 define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
53 ; CHECK: lg %r2, 0(%r3)
54 ; CHECK: [[LOOP:\.[^:]*]]:
55 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
56 ; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]]
57 ; CHECK: lgr [[NEW]], %r4
58 ; CHECK: csg %r2, [[NEW]], 0(%r3)
61 %res = atomicrmw umax i64 *%src, i64 %b seq_cst
65 ; Check the high end of the aligned CSG range.
66 define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
68 ; CHECK: lg %r2, 524280(%r3)
69 ; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
71 %ptr = getelementptr i64 *%src, i64 65535
72 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
76 ; Check the next doubleword up, which requires separate address logic.
77 define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
79 ; CHECK: agfi %r3, 524288
80 ; CHECK: lg %r2, 0(%r3)
81 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
83 %ptr = getelementptr i64 *%src, i64 65536
84 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
88 ; Check the low end of the CSG range.
89 define i64 @f7(i64 %dummy, i64 *%src, i64 %b) {
91 ; CHECK: lg %r2, -524288(%r3)
92 ; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
94 %ptr = getelementptr i64 *%src, i64 -65536
95 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
99 ; Check the next doubleword down, which requires separate address logic.
100 define i64 @f8(i64 %dummy, i64 *%src, i64 %b) {
102 ; CHECK: agfi %r3, -524296
103 ; CHECK: lg %r2, 0(%r3)
104 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
106 %ptr = getelementptr i64 *%src, i64 -65537
107 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
111 ; Check that indexed addresses are not allowed.
112 define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) {
114 ; CHECK: agr %r3, %r4
115 ; CHECK: lg %r2, 0(%r3)
116 ; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
118 %add = add i64 %base, %index
119 %ptr = inttoptr i64 %add to i64 *
120 %res = atomicrmw min i64 *%ptr, i64 %b seq_cst
124 ; Check that constants are handled.
125 define i64 @f10(i64 %dummy, i64 *%ptr) {
127 ; CHECK: lghi [[LIMIT:%r[0-9]+]], 42
128 ; CHECK: lg %r2, 0(%r3)
129 ; CHECK: [[LOOP:\.[^:]*]]:
130 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2
131 ; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
132 ; CHECK: lghi [[NEW]], 42
133 ; CHECK: csg %r2, [[NEW]], 0(%r3)
136 %res = atomicrmw min i64 *%ptr, i64 42 seq_cst