1 # Test 32-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer
2 # number of instructions causes some branches to be out of range.
3 # RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
8 # conditional branch to after0
11 # conditional branch to after0
13 # 0xffc6 bytes, from MVIY instructions
14 # conditional branch to main
17 # conditional branch to main
20 # Each conditional branch sequence occupies 14 bytes if it uses a short
21 # branch and 20 if it uses a long one. The ones before "main:" have to
22 # take the branch length into account, which is 6 for short branches,
23 # so the final (0x3a - 6) / 14 == 3 blocks can use short branches.
24 # The ones after "main:" do not, so the first 0x3a / 14 == 4 blocks
25 # can use short branches. The conservative algorithm we use makes
26 # one of the forward branches unnecessarily long, as noted in the
29 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
30 # CHECK: s [[REG]], 0(%r4)
31 # CHECK: clfi [[REG]], 50
32 # CHECK: jgl [[LABEL:\.L[^ ]*]]
33 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
34 # CHECK: s [[REG]], 0(%r4)
35 # CHECK: clfi [[REG]], 51
36 # CHECK: jgl [[LABEL]]
37 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
38 # CHECK: s [[REG]], 0(%r4)
39 # CHECK: clfi [[REG]], 52
40 # CHECK: jgl [[LABEL]]
41 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
42 # CHECK: s [[REG]], 0(%r4)
43 # CHECK: clfi [[REG]], 53
44 # CHECK: jgl [[LABEL]]
45 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
46 # CHECK: s [[REG]], 0(%r4)
47 # CHECK: clfi [[REG]], 54
48 # CHECK: jgl [[LABEL]]
49 # ...as mentioned above, the next one could be a CLIJL instead...
50 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
51 # CHECK: s [[REG]], 0(%r4)
52 # CHECK: clfi [[REG]], 55
53 # CHECK: jgl [[LABEL]]
54 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
55 # CHECK: s [[REG]], 0(%r4)
56 # CHECK: clijl [[REG]], 56, [[LABEL]]
57 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
58 # CHECK: s [[REG]], 0(%r4)
59 # CHECK: clijl [[REG]], 57, [[LABEL]]
60 # ...main goes here...
61 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
62 # CHECK: s [[REG]], 0(%r4)
63 # CHECK: clijl [[REG]], 100, [[LABEL:\.L[^ ]*]]
64 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
65 # CHECK: s [[REG]], 0(%r4)
66 # CHECK: clijl [[REG]], 101, [[LABEL]]
67 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
68 # CHECK: s [[REG]], 0(%r4)
69 # CHECK: clijl [[REG]], 102, [[LABEL]]
70 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
71 # CHECK: s [[REG]], 0(%r4)
72 # CHECK: clijl [[REG]], 103, [[LABEL]]
73 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
74 # CHECK: s [[REG]], 0(%r4)
75 # CHECK: clfi [[REG]], 104
76 # CHECK: jgl [[LABEL]]
77 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
78 # CHECK: s [[REG]], 0(%r4)
79 # CHECK: clfi [[REG]], 105
80 # CHECK: jgl [[LABEL]]
81 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
82 # CHECK: s [[REG]], 0(%r4)
83 # CHECK: clfi [[REG]], 106
84 # CHECK: jgl [[LABEL]]
85 # CHECK: l [[REG:%r[0-5]]], 0(%r3)
86 # CHECK: s [[REG]], 0(%r4)
87 # CHECK: clfi [[REG]], 107
88 # CHECK: jgl [[LABEL]]
93 print 'define void @f1(i8 *%base, i32 *%stopa, i32 *%stopb) {'
95 print ' br label %before0'
98 for i in xrange(branch_blocks):
99 next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
100 print 'before%d:' % i
101 print ' %%bcur%da = load i32 , i32 *%%stopa' % i
102 print ' %%bcur%db = load i32 , i32 *%%stopb' % i
103 print ' %%bsub%d = sub i32 %%bcur%da, %%bcur%db' % (i, i, i)
104 print ' %%btest%d = icmp ult i32 %%bsub%d, %d' % (i, i, i + 50)
105 print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next)
110 for i in xrange(0, main_size, 6):
112 offset = 4096 + b % 500000
114 print ' %%ptr%d = getelementptr i8, i8 *%%base, i64 %d' % (i, offset)
115 print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i)
117 for i in xrange(branch_blocks):
118 print ' %%acur%da = load i32 , i32 *%%stopa' % i
119 print ' %%acur%db = load i32 , i32 *%%stopb' % i
120 print ' %%asub%d = sub i32 %%acur%da, %%acur%db' % (i, i, i)
121 print ' %%atest%d = icmp ult i32 %%asub%d, %d' % (i, i, i + 100)
122 print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i)