1 ;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
7 call void @llvm.AMDGPU.shader.type(i32 1)
8 %0 = load <4 x i32> addrspace(2)* addrspace(8)* inttoptr (i32 6 to <4 x i32> addrspace(2)* addrspace(8)*)
9 %1 = getelementptr <4 x i32> addrspace(2)* %0, i32 0
10 %2 = load <4 x i32> addrspace(2)* %1
11 %3 = call i32 @llvm.SI.vs.load.buffer.index()
12 %4 = call <4 x float> @llvm.SI.vs.load.input(<4 x i32> %2, i32 0, i32 %3)
13 %5 = extractelement <4 x float> %4, i32 0
14 %6 = extractelement <4 x float> %4, i32 1
15 %7 = extractelement <4 x float> %4, i32 2
16 %8 = extractelement <4 x float> %4, i32 3
17 %9 = load <4 x i32> addrspace(2)* addrspace(8)* inttoptr (i32 6 to <4 x i32> addrspace(2)* addrspace(8)*)
18 %10 = getelementptr <4 x i32> addrspace(2)* %9, i32 1
19 %11 = load <4 x i32> addrspace(2)* %10
20 %12 = call i32 @llvm.SI.vs.load.buffer.index()
21 %13 = call <4 x float> @llvm.SI.vs.load.input(<4 x i32> %11, i32 0, i32 %12)
22 %14 = extractelement <4 x float> %13, i32 0
23 %15 = extractelement <4 x float> %13, i32 1
24 %16 = extractelement <4 x float> %13, i32 2
25 %17 = extractelement <4 x float> %13, i32 3
26 call void @llvm.SI.export(i32 15, i32 0, i32 0, i32 32, i32 0, float %14, float %15, float %16, float %17)
27 call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %5, float %6, float %7, float %8)
31 declare void @llvm.AMDGPU.shader.type(i32)
33 declare i32 @llvm.SI.vs.load.buffer.index() readnone
35 declare <4 x float> @llvm.SI.vs.load.input(<4 x i32>, i32, i32)
37 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)