1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3 ; SI-LABEL: {{^}}s_movk_i32_k0:
4 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}}
5 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
6 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
7 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
8 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
10 define void @s_movk_i32_k0(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
11 %loada = load i64 addrspace(1)* %a, align 4
12 %or = or i64 %loada, 4295032831 ; ((1 << 16) - 1) | (1 << 32)
13 store i64 %or, i64 addrspace(1)* %out
17 ; SI-LABEL: {{^}}s_movk_i32_k1:
18 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}}
19 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
20 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
21 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
22 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
24 define void @s_movk_i32_k1(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
25 %loada = load i64 addrspace(1)* %a, align 4
26 %or = or i64 %loada, 4295000063 ; ((1 << 15) - 1) | (1 << 32)
27 store i64 %or, i64 addrspace(1)* %out
31 ; SI-LABEL: {{^}}s_movk_i32_k2:
32 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}}
33 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 64{{$}}
34 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
35 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
36 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
38 define void @s_movk_i32_k2(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
39 %loada = load i64 addrspace(1)* %a, align 4
40 %or = or i64 %loada, 274877939711 ; ((1 << 15) - 1) | (64 << 32)
41 store i64 %or, i64 addrspace(1)* %out
45 ; SI-LABEL: {{^}}s_movk_i32_k3:
46 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x8000{{$}}
47 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
48 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
49 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
50 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
52 define void @s_movk_i32_k3(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
53 %loada = load i64 addrspace(1)* %a, align 4
54 %or = or i64 %loada, 4295000064 ; (1 << 15) | (1 << 32)
55 store i64 %or, i64 addrspace(1)* %out
59 ; SI-LABEL: {{^}}s_movk_i32_k4:
60 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0x20000{{$}}
61 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 1{{$}}
62 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
63 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
64 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
66 define void @s_movk_i32_k4(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
67 %loada = load i64 addrspace(1)* %a, align 4
68 %or = or i64 %loada, 4295098368 ; (1 << 17) | (1 << 32)
69 store i64 %or, i64 addrspace(1)* %out
73 ; SI-LABEL: {{^}}s_movk_i32_k5:
74 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0xffef{{$}}
75 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0xff00ffff{{$}}
76 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
77 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
78 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
80 define void @s_movk_i32_k5(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
81 %loada = load i64 addrspace(1)* %a, align 4
82 %or = or i64 %loada, 18374967954648334319 ; -17 & 0xff00ffffffffffff
83 store i64 %or, i64 addrspace(1)* %out
87 ; SI-LABEL: {{^}}s_movk_i32_k6:
88 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x41{{$}}
89 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 63{{$}}
90 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
91 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
92 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
94 define void @s_movk_i32_k6(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
95 %loada = load i64 addrspace(1)* %a, align 4
96 %or = or i64 %loada, 270582939713 ; 65 | (63 << 32)
97 store i64 %or, i64 addrspace(1)* %out
101 ; SI-LABEL: {{^}}s_movk_i32_k7:
102 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x2000{{$}}
103 ; SI-DAG: s_movk_i32 [[HI_S_IMM:s[0-9]+]], 0x4000{{$}}
104 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
105 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
106 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
108 define void @s_movk_i32_k7(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
109 %loada = load i64 addrspace(1)* %a, align 4
110 %or = or i64 %loada, 70368744185856; ((1 << 13)) | ((1 << 14) << 32)
111 store i64 %or, i64 addrspace(1)* %out
116 ; SI-LABEL: {{^}}s_movk_i32_k8:
117 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8000{{$}}
118 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}}
119 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
120 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
121 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
123 define void @s_movk_i32_k8(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
124 %loada = load i64 addrspace(1)* %a, align 4
125 %or = or i64 %loada, 1229782942255906816 ; 0x11111111ffff8000
126 store i64 %or, i64 addrspace(1)* %out
130 ; SI-LABEL: {{^}}s_movk_i32_k9:
131 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8001{{$}}
132 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}}
133 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
134 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
135 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
137 define void @s_movk_i32_k9(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
138 %loada = load i64 addrspace(1)* %a, align 4
139 %or = or i64 %loada, 1229782942255906817 ; 0x11111111ffff8001
140 store i64 %or, i64 addrspace(1)* %out
144 ; SI-LABEL: {{^}}s_movk_i32_k10:
145 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8888{{$}}
146 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}}
147 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
148 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
149 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
151 define void @s_movk_i32_k10(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
152 %loada = load i64 addrspace(1)* %a, align 4
153 %or = or i64 %loada, 1229782942255909000 ; 0x11111111ffff8888
154 store i64 %or, i64 addrspace(1)* %out
158 ; SI-LABEL: {{^}}s_movk_i32_k11:
159 ; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x8fff{{$}}
160 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}}
161 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
162 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
163 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
165 define void @s_movk_i32_k11(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
166 %loada = load i64 addrspace(1)* %a, align 4
167 %or = or i64 %loada, 1229782942255910911 ; 0x11111111ffff8fff
168 store i64 %or, i64 addrspace(1)* %out
172 ; SI-LABEL: {{^}}s_movk_i32_k12:
173 ; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff7001{{$}}
174 ; SI-DAG: s_mov_b32 [[HI_S_IMM:s[0-9]+]], 0x11111111{{$}}
175 ; SI-DAG: buffer_load_dwordx2 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}},
176 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[LO_S_IMM]], v[[LO_VREG]]
177 ; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, [[HI_S_IMM]], v[[HI_VREG]]
179 define void @s_movk_i32_k12(i64 addrspace(1)* %out, i64 addrspace(1)* %a, i64 addrspace(1)* %b) {
180 %loada = load i64 addrspace(1)* %a, align 4
181 %or = or i64 %loada, 1229782942255902721 ; 0x11111111ffff7001
182 store i64 %or, i64 addrspace(1)* %out