1 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
4 ; FUNC-LABEL: {{^}}rotl_i32:
5 ; R600: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x
7 ; R600: BIT_ALIGN_INT {{T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}}
9 ; SI: s_sub_i32 [[SDST:s[0-9]+]], 32, {{[s][0-9]+}}
10 ; SI: v_mov_b32_e32 [[VDST:v[0-9]+]], [[SDST]]
11 ; SI: v_alignbit_b32 {{v[0-9]+, [s][0-9]+, s[0-9]+}}, [[VDST]]
12 define void @rotl_i32(i32 addrspace(1)* %in, i32 %x, i32 %y) {
18 store i32 %3, i32 addrspace(1)* %in
22 ; FUNC-LABEL: {{^}}rotl_v2i32:
25 ; SI-DAG: v_alignbit_b32
26 ; SI-DAG: v_alignbit_b32
28 define void @rotl_v2i32(<2 x i32> addrspace(1)* %in, <2 x i32> %x, <2 x i32> %y) {
30 %0 = shl <2 x i32> %x, %y
31 %1 = sub <2 x i32> <i32 32, i32 32>, %y
32 %2 = lshr <2 x i32> %x, %1
33 %3 = or <2 x i32> %0, %2
34 store <2 x i32> %3, <2 x i32> addrspace(1)* %in
38 ; FUNC-LABEL: {{^}}rotl_v4i32:
40 ; SI-DAG: v_alignbit_b32
42 ; SI-DAG: v_alignbit_b32
44 ; SI-DAG: v_alignbit_b32
46 ; SI-DAG: v_alignbit_b32
48 define void @rotl_v4i32(<4 x i32> addrspace(1)* %in, <4 x i32> %x, <4 x i32> %y) {
50 %0 = shl <4 x i32> %x, %y
51 %1 = sub <4 x i32> <i32 32, i32 32, i32 32, i32 32>, %y
52 %2 = lshr <4 x i32> %x, %1
53 %3 = or <4 x i32> %0, %2
54 store <4 x i32> %3, <4 x i32> addrspace(1)* %in