1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3 ; FUNC-LABEL: @lds_atomic_xchg_ret_i32:
4 ; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
5 ; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
6 ; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
7 ; SI: DS_WRXCHG_RTN_B32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0]
8 ; SI: BUFFER_STORE_DWORD [[RESULT]],
10 define void @lds_atomic_xchg_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
11 %result = atomicrmw xchg i32 addrspace(3)* %ptr, i32 4 seq_cst
12 store i32 %result, i32 addrspace(1)* %out, align 4
16 ; FUNC-LABEL: @lds_atomic_xchg_ret_i32_offset:
17 ; SI: DS_WRXCHG_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
19 define void @lds_atomic_xchg_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
20 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
21 %result = atomicrmw xchg i32 addrspace(3)* %gep, i32 4 seq_cst
22 store i32 %result, i32 addrspace(1)* %out, align 4
26 ; XXX - Is it really necessary to load 4 into VGPR?
27 ; FUNC-LABEL: @lds_atomic_add_ret_i32:
28 ; SI: S_LOAD_DWORD [[SPTR:s[0-9]+]],
29 ; SI: V_MOV_B32_e32 [[DATA:v[0-9]+]], 4
30 ; SI: V_MOV_B32_e32 [[VPTR:v[0-9]+]], [[SPTR]]
31 ; SI: DS_ADD_RTN_U32 [[RESULT:v[0-9]+]], [[VPTR]], [[DATA]], 0x0, [M0]
32 ; SI: BUFFER_STORE_DWORD [[RESULT]],
34 define void @lds_atomic_add_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
35 %result = atomicrmw add i32 addrspace(3)* %ptr, i32 4 seq_cst
36 store i32 %result, i32 addrspace(1)* %out, align 4
40 ; FUNC-LABEL: @lds_atomic_add_ret_i32_offset:
41 ; SI: DS_ADD_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
43 define void @lds_atomic_add_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
44 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
45 %result = atomicrmw add i32 addrspace(3)* %gep, i32 4 seq_cst
46 store i32 %result, i32 addrspace(1)* %out, align 4
50 ; FUNC-LABEL: @lds_atomic_sub_ret_i32:
53 define void @lds_atomic_sub_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
54 %result = atomicrmw sub i32 addrspace(3)* %ptr, i32 4 seq_cst
55 store i32 %result, i32 addrspace(1)* %out, align 4
59 ; FUNC-LABEL: @lds_atomic_sub_ret_i32_offset:
60 ; SI: DS_SUB_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
62 define void @lds_atomic_sub_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
63 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
64 %result = atomicrmw sub i32 addrspace(3)* %gep, i32 4 seq_cst
65 store i32 %result, i32 addrspace(1)* %out, align 4
69 ; FUNC-LABEL: @lds_atomic_and_ret_i32:
72 define void @lds_atomic_and_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
73 %result = atomicrmw and i32 addrspace(3)* %ptr, i32 4 seq_cst
74 store i32 %result, i32 addrspace(1)* %out, align 4
78 ; FUNC-LABEL: @lds_atomic_and_ret_i32_offset:
79 ; SI: DS_AND_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
81 define void @lds_atomic_and_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
82 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
83 %result = atomicrmw and i32 addrspace(3)* %gep, i32 4 seq_cst
84 store i32 %result, i32 addrspace(1)* %out, align 4
88 ; FUNC-LABEL: @lds_atomic_or_ret_i32:
91 define void @lds_atomic_or_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
92 %result = atomicrmw or i32 addrspace(3)* %ptr, i32 4 seq_cst
93 store i32 %result, i32 addrspace(1)* %out, align 4
97 ; FUNC-LABEL: @lds_atomic_or_ret_i32_offset:
98 ; SI: DS_OR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
100 define void @lds_atomic_or_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
101 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
102 %result = atomicrmw or i32 addrspace(3)* %gep, i32 4 seq_cst
103 store i32 %result, i32 addrspace(1)* %out, align 4
107 ; FUNC-LABEL: @lds_atomic_xor_ret_i32:
110 define void @lds_atomic_xor_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
111 %result = atomicrmw xor i32 addrspace(3)* %ptr, i32 4 seq_cst
112 store i32 %result, i32 addrspace(1)* %out, align 4
116 ; FUNC-LABEL: @lds_atomic_xor_ret_i32_offset:
117 ; SI: DS_XOR_RTN_B32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
119 define void @lds_atomic_xor_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
120 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
121 %result = atomicrmw xor i32 addrspace(3)* %gep, i32 4 seq_cst
122 store i32 %result, i32 addrspace(1)* %out, align 4
126 ; FIXME: There is no atomic nand instr
127 ; XFUNC-LABEL: @lds_atomic_nand_ret_i32:uction, so we somehow need to expand this.
128 ; define void @lds_atomic_nand_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
129 ; %result = atomicrmw nand i32 addrspace(3)* %ptr, i32 4 seq_cst
130 ; store i32 %result, i32 addrspace(1)* %out, align 4
134 ; FUNC-LABEL: @lds_atomic_min_ret_i32:
137 define void @lds_atomic_min_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
138 %result = atomicrmw min i32 addrspace(3)* %ptr, i32 4 seq_cst
139 store i32 %result, i32 addrspace(1)* %out, align 4
143 ; FUNC-LABEL: @lds_atomic_min_ret_i32_offset:
144 ; SI: DS_MIN_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
146 define void @lds_atomic_min_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
147 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
148 %result = atomicrmw min i32 addrspace(3)* %gep, i32 4 seq_cst
149 store i32 %result, i32 addrspace(1)* %out, align 4
153 ; FUNC-LABEL: @lds_atomic_max_ret_i32:
156 define void @lds_atomic_max_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
157 %result = atomicrmw max i32 addrspace(3)* %ptr, i32 4 seq_cst
158 store i32 %result, i32 addrspace(1)* %out, align 4
162 ; FUNC-LABEL: @lds_atomic_max_ret_i32_offset:
163 ; SI: DS_MAX_RTN_I32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
165 define void @lds_atomic_max_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
166 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
167 %result = atomicrmw max i32 addrspace(3)* %gep, i32 4 seq_cst
168 store i32 %result, i32 addrspace(1)* %out, align 4
172 ; FUNC-LABEL: @lds_atomic_umin_ret_i32:
175 define void @lds_atomic_umin_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
176 %result = atomicrmw umin i32 addrspace(3)* %ptr, i32 4 seq_cst
177 store i32 %result, i32 addrspace(1)* %out, align 4
181 ; FUNC-LABEL: @lds_atomic_umin_ret_i32_offset:
182 ; SI: DS_MIN_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
184 define void @lds_atomic_umin_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
185 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
186 %result = atomicrmw umin i32 addrspace(3)* %gep, i32 4 seq_cst
187 store i32 %result, i32 addrspace(1)* %out, align 4
191 ; FUNC-LABEL: @lds_atomic_umax_ret_i32:
194 define void @lds_atomic_umax_ret_i32(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
195 %result = atomicrmw umax i32 addrspace(3)* %ptr, i32 4 seq_cst
196 store i32 %result, i32 addrspace(1)* %out, align 4
200 ; FUNC-LABEL: @lds_atomic_umax_ret_i32_offset:
201 ; SI: DS_MAX_RTN_U32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, 0x10
203 define void @lds_atomic_umax_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) nounwind {
204 %gep = getelementptr i32 addrspace(3)* %ptr, i32 4
205 %result = atomicrmw umax i32 addrspace(3)* %gep, i32 4 seq_cst
206 store i32 %result, i32 addrspace(1)* %out, align 4