1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600-CHECK %s
3 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s
5 ; Load an i8 value from the global address space.
7 ; R600-CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}}
10 ; SI-CHECK: BUFFER_LOAD_UBYTE VGPR{{[0-9]+}},
11 define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
12 %1 = load i8 addrspace(1)* %in
13 %2 = zext i8 %1 to i32
14 store i32 %2, i32 addrspace(1)* %out
18 ; R600-CHECK: @load_i8_sext
19 ; R600-CHECK: VTX_READ_8 [[DST:T[0-9]\.[XYZW]]], [[DST]]
20 ; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
22 ; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
24 ; SI-CHECK: @load_i8_sext
25 ; SI-CHECK: BUFFER_LOAD_SBYTE
26 define void @load_i8_sext(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
28 %0 = load i8 addrspace(1)* %in
29 %1 = sext i8 %0 to i32
30 store i32 %1, i32 addrspace(1)* %out
34 ; Load an i16 value from the global address space.
35 ; R600-CHECK: @load_i16
36 ; R600-CHECK: VTX_READ_16 T{{[0-9]+\.X, T[0-9]+\.X}}
38 ; SI-CHECK: BUFFER_LOAD_USHORT
39 define void @load_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) {
41 %0 = load i16 addrspace(1)* %in
42 %1 = zext i16 %0 to i32
43 store i32 %1, i32 addrspace(1)* %out
47 ; R600-CHECK: @load_i16_sext
48 ; R600-CHECK: VTX_READ_16 [[DST:T[0-9]\.[XYZW]]], [[DST]]
49 ; R600-CHECK: LSHL {{[* ]*}}T{{[0-9]}}.[[LSHL_CHAN:[XYZW]]], [[DST]]
51 ; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, PV.[[LSHL_CHAN]]
53 ; SI-CHECK: @load_i16_sext
54 ; SI-CHECK: BUFFER_LOAD_SSHORT
55 define void @load_i16_sext(i32 addrspace(1)* %out, i16 addrspace(1)* %in) {
57 %0 = load i16 addrspace(1)* %in
58 %1 = sext i16 %0 to i32
59 store i32 %1, i32 addrspace(1)* %out
63 ; load an i32 value from the global address space.
64 ; R600-CHECK: @load_i32
65 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
68 ; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}}
69 define void @load_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
71 %0 = load i32 addrspace(1)* %in
72 store i32 %0, i32 addrspace(1)* %out
76 ; load a f32 value from the global address space.
77 ; R600-CHECK: @load_f32
78 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
81 ; SI-CHECK: BUFFER_LOAD_DWORD VGPR{{[0-9]+}}
82 define void @load_f32(float addrspace(1)* %out, float addrspace(1)* %in) {
84 %0 = load float addrspace(1)* %in
85 store float %0, float addrspace(1)* %out
89 ; load a v2f32 value from the global address space
90 ; R600-CHECK: @load_v2f32
91 ; R600-CHECK: VTX_READ_32
92 ; R600-CHECK: VTX_READ_32
94 ; SI-CHECK: @load_v2f32
95 ; SI-CHECK: BUFFER_LOAD_DWORDX2
96 define void @load_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in) {
98 %0 = load <2 x float> addrspace(1)* %in
99 store <2 x float> %0, <2 x float> addrspace(1)* %out
103 ; Load an i32 value from the constant address space.
104 ; R600-CHECK: @load_const_addrspace_i32
105 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
107 ; SI-CHECK: @load_const_addrspace_i32
108 ; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}}
109 define void @load_const_addrspace_i32(i32 addrspace(1)* %out, i32 addrspace(2)* %in) {
111 %0 = load i32 addrspace(2)* %in
112 store i32 %0, i32 addrspace(1)* %out
116 ; Load a f32 value from the constant address space.
117 ; R600-CHECK: @load_const_addrspace_f32
118 ; R600-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0
120 ; SI-CHECK: @load_const_addrspace_f32
121 ; SI-CHECK: S_LOAD_DWORD SGPR{{[0-9]+}}
122 define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) {
123 %1 = load float addrspace(2)* %in
124 store float %1, float addrspace(1)* %out
128 ; R600-CHECK: @load_i64
132 ; SI-CHECK: @load_i64
133 ; SI-CHECK: BUFFER_LOAD_DWORDX2
134 define void @load_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
136 %0 = load i64 addrspace(1)* %in
137 store i64 %0, i64 addrspace(1)* %out
141 ; R600-CHECK: @load_i64_sext
144 ; R600-CHECK: ASHR {{[* ]*}}T{{[0-9]\.[XYZW]}}, T{{[0-9]\.[XYZW]}}, literal.x
146 ; SI-CHECK: @load_i64_sext
147 ; SI-CHECK: BUFFER_LOAD_DWORDX2 [[VAL:VGPR[0-9]_VGPR[0-9]]]
148 ; SI-CHECK: V_LSHL_B64 [[LSHL:VGPR[0-9]_VGPR[0-9]]], [[VAL]], 32
149 ; SI-CHECK: V_ASHR_I64 VGPR{{[0-9]}}_VGPR{{[0-9]}}, [[LSHL]], 32
151 define void @load_i64_sext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
153 %0 = load i32 addrspace(1)* %in
154 %1 = sext i32 %0 to i64
155 store i64 %1, i64 addrspace(1)* %out
159 ; R600-CHECK: @load_i64_zext
162 define void @load_i64_zext(i64 addrspace(1)* %out, i32 addrspace(1)* %in) {
164 %0 = load i32 addrspace(1)* %in
165 %1 = zext i32 %0 to i64
166 store i64 %1, i64 addrspace(1)* %out