1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
3 declare { float, i1 } @llvm.AMDGPU.div.scale.f32(float, float, i1) nounwind readnone
4 declare { double, i1 } @llvm.AMDGPU.div.scale.f64(double, double, i1) nounwind readnone
6 ; SI-LABEL @test_div_scale_f32_1:
8 define void @test_div_scale_f32_1(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr) nounwind {
9 %a = load float addrspace(1)* %aptr, align 4
10 %b = load float addrspace(1)* %bptr, align 4
11 %result = call { float, i1 } @llvm.AMDGPU.div.scale.f32(float %a, float %b, i1 false) nounwind readnone
12 %result0 = extractvalue { float, i1 } %result, 0
13 store float %result0, float addrspace(1)* %out, align 4
17 ; SI-LABEL @test_div_scale_f32_2:
19 define void @test_div_scale_f32_2(float addrspace(1)* %out, float addrspace(1)* %aptr, float addrspace(1)* %bptr) nounwind {
20 %a = load float addrspace(1)* %aptr, align 4
21 %b = load float addrspace(1)* %bptr, align 4
22 %result = call { float, i1 } @llvm.AMDGPU.div.scale.f32(float %a, float %b, i1 true) nounwind readnone
23 %result0 = extractvalue { float, i1 } %result, 0
24 store float %result0, float addrspace(1)* %out, align 4
28 ; SI-LABEL @test_div_scale_f64_1:
30 define void @test_div_scale_f64_1(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %bptr, double addrspace(1)* %cptr) nounwind {
31 %a = load double addrspace(1)* %aptr, align 8
32 %b = load double addrspace(1)* %bptr, align 8
33 %result = call { double, i1 } @llvm.AMDGPU.div.scale.f64(double %a, double %b, i1 false) nounwind readnone
34 %result0 = extractvalue { double, i1 } %result, 0
35 store double %result0, double addrspace(1)* %out, align 8
39 ; SI-LABEL @test_div_scale_f64_1:
41 define void @test_div_scale_f64_2(double addrspace(1)* %out, double addrspace(1)* %aptr, double addrspace(1)* %bptr, double addrspace(1)* %cptr) nounwind {
42 %a = load double addrspace(1)* %aptr, align 8
43 %b = load double addrspace(1)* %bptr, align 8
44 %result = call { double, i1 } @llvm.AMDGPU.div.scale.f64(double %a, double %b, i1 true) nounwind readnone
45 %result0 = extractvalue { double, i1 } %result, 0
46 store double %result0, double addrspace(1)* %out, align 8