1 ; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
3 declare float @llvm.AMDGPU.cvt.f32.ubyte0(i32) nounwind readnone
4 declare float @llvm.AMDGPU.cvt.f32.ubyte1(i32) nounwind readnone
5 declare float @llvm.AMDGPU.cvt.f32.ubyte2(i32) nounwind readnone
6 declare float @llvm.AMDGPU.cvt.f32.ubyte3(i32) nounwind readnone
8 ; SI-LABEL: {{^}}test_unpack_byte0_to_float:
10 define void @test_unpack_byte0_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
11 %val = load i32 addrspace(1)* %in, align 4
12 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte0(i32 %val) nounwind readnone
13 store float %cvt, float addrspace(1)* %out, align 4
17 ; SI-LABEL: {{^}}test_unpack_byte1_to_float:
18 ; SI: v_cvt_f32_ubyte1
19 define void @test_unpack_byte1_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
20 %val = load i32 addrspace(1)* %in, align 4
21 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte1(i32 %val) nounwind readnone
22 store float %cvt, float addrspace(1)* %out, align 4
26 ; SI-LABEL: {{^}}test_unpack_byte2_to_float:
27 ; SI: v_cvt_f32_ubyte2
28 define void @test_unpack_byte2_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
29 %val = load i32 addrspace(1)* %in, align 4
30 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte2(i32 %val) nounwind readnone
31 store float %cvt, float addrspace(1)* %out, align 4
35 ; SI-LABEL: {{^}}test_unpack_byte3_to_float:
36 ; SI: v_cvt_f32_ubyte3
37 define void @test_unpack_byte3_to_float(float addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
38 %val = load i32 addrspace(1)* %in, align 4
39 %cvt = call float @llvm.AMDGPU.cvt.f32.ubyte3(i32 %val) nounwind readnone
40 store float %cvt, float addrspace(1)* %out, align 4