1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
6 define void @fneg_v2(<2 x float> addrspace(1)* nocapture %out, <2 x float> %in) {
8 %0 = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %in
9 store <2 x float> %0, <2 x float> addrspace(1)* %out
13 ; R600-CHECK-LABEL: @fneg_v4
18 ; SI-CHECK-LABEL: @fneg_v4
19 ; SI-CHECK: V_ADD_F32_e64 VGPR{{[0-9]}}, SGPR{{[0-9]}}, 0, 0, 0, 0, 1
20 ; SI-CHECK: V_ADD_F32_e64 VGPR{{[0-9]}}, SGPR{{[0-9]}}, 0, 0, 0, 0, 1
21 ; SI-CHECK: V_ADD_F32_e64 VGPR{{[0-9]}}, SGPR{{[0-9]}}, 0, 0, 0, 0, 1
22 ; SI-CHECK: V_ADD_F32_e64 VGPR{{[0-9]}}, SGPR{{[0-9]}}, 0, 0, 0, 0, 1
23 define void @fneg_v4(<4 x float> addrspace(1)* nocapture %out, <4 x float> %in) {
25 %0 = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %in
26 store <4 x float> %0, <4 x float> addrspace(1)* %out
30 ; DAGCombiner will transform:
31 ; (fneg (f32 bitcast (i32 a))) => (f32 bitcast (xor (i32 a), 0x80000000))
32 ; unless the target returns true for isNegFree()
37 define void @fneg_free(float addrspace(1)* %out, i32 %in) {
39 %0 = bitcast i32 %in to float
40 %1 = fsub float 0.0, %0
41 store float %1, float addrspace(1)* %out