1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
4 ; FUNC-LABEL: {{^}}fneg_f32:
8 define void @fneg_f32(float addrspace(1)* %out, float %in) {
9 %fneg = fsub float -0.000000e+00, %in
10 store float %fneg, float addrspace(1)* %out
14 ; FUNC-LABEL: {{^}}fneg_v2f32:
20 define void @fneg_v2f32(<2 x float> addrspace(1)* nocapture %out, <2 x float> %in) {
21 %fneg = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %in
22 store <2 x float> %fneg, <2 x float> addrspace(1)* %out
26 ; FUNC-LABEL: {{^}}fneg_v4f32:
36 define void @fneg_v4f32(<4 x float> addrspace(1)* nocapture %out, <4 x float> %in) {
37 %fneg = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %in
38 store <4 x float> %fneg, <4 x float> addrspace(1)* %out
42 ; DAGCombiner will transform:
43 ; (fneg (f32 bitcast (i32 a))) => (f32 bitcast (xor (i32 a), 0x80000000))
44 ; unless the target returns true for isNegFree()
46 ; FUNC-LABEL: {{^}}fneg_free_f32:
50 ; XXX: We could use v_add_f32_e64 with the negate bit here instead.
51 ; SI: v_sub_f32_e64 v{{[0-9]}}, 0.0, s{{[0-9]+$}}
52 define void @fneg_free_f32(float addrspace(1)* %out, i32 %in) {
53 %bc = bitcast i32 %in to float
54 %fsub = fsub float 0.0, %bc
55 store float %fsub, float addrspace(1)* %out
59 ; FUNC-LABEL: {{^}}fneg_fold_f32:
60 ; SI: s_load_dword [[NEG_VALUE:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb
62 ; SI: v_mul_f32_e64 v{{[0-9]+}}, -[[NEG_VALUE]], [[NEG_VALUE]]
63 define void @fneg_fold_f32(float addrspace(1)* %out, float %in) {
64 %fsub = fsub float -0.0, %in
65 %fmul = fmul float %fsub, %in
66 store float %fmul, float addrspace(1)* %out