1 ; RUN: llc -march=r600 -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s
3 ; FIXME: We don't get cases where the address was an SGPR because we
4 ; get a copy to the address register for each one.
6 @lds = addrspace(3) global [512 x float] zeroinitializer, align 4
7 @lds.f64 = addrspace(3) global [512 x double] zeroinitializer, align 8
9 ; SI-LABEL: @simple_read2_f32
10 ; SI: DS_READ2_B32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}}, 0x0, 0x8
11 ; SI: S_WAITCNT lgkmcnt(0)
12 ; SI: V_ADD_F32_e32 [[RESULT:v[0-9]+]], v[[HI_VREG]], v[[LO_VREG]]
13 ; SI: BUFFER_STORE_DWORD [[RESULT]]
15 define void @simple_read2_f32(float addrspace(1)* %out) #0 {
16 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
17 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
18 %val0 = load float addrspace(3)* %arrayidx0, align 4
19 %add.x = add nsw i32 %x.i, 8
20 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
21 %val1 = load float addrspace(3)* %arrayidx1, align 4
22 %sum = fadd float %val0, %val1
23 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
24 store float %sum, float addrspace(1)* %out.gep, align 4
28 ; SI-LABEL: @simple_read2_f32_max_offset
29 ; SI: DS_READ2_B32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}}, 0x0, 0xff
30 ; SI: S_WAITCNT lgkmcnt(0)
31 ; SI: V_ADD_F32_e32 [[RESULT:v[0-9]+]], v[[HI_VREG]], v[[LO_VREG]]
32 ; SI: BUFFER_STORE_DWORD [[RESULT]]
34 define void @simple_read2_f32_max_offset(float addrspace(1)* %out) #0 {
35 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
36 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
37 %val0 = load float addrspace(3)* %arrayidx0, align 4
38 %add.x = add nsw i32 %x.i, 255
39 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
40 %val1 = load float addrspace(3)* %arrayidx1, align 4
41 %sum = fadd float %val0, %val1
42 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
43 store float %sum, float addrspace(1)* %out.gep, align 4
47 ; SI-LABEL: @simple_read2_f32_too_far
49 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x0
50 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x404
52 define void @simple_read2_f32_too_far(float addrspace(1)* %out) #0 {
53 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
54 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
55 %val0 = load float addrspace(3)* %arrayidx0, align 4
56 %add.x = add nsw i32 %x.i, 257
57 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
58 %val1 = load float addrspace(3)* %arrayidx1, align 4
59 %sum = fadd float %val0, %val1
60 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
61 store float %sum, float addrspace(1)* %out.gep, align 4
65 ; SI-LABEL: @simple_read2_f32_x2
66 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]], 0x0, 0x8
67 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]], 0xb, 0x1b
69 define void @simple_read2_f32_x2(float addrspace(1)* %out) #0 {
70 %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
71 %idx.0 = add nsw i32 %tid.x, 0
72 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.0
73 %val0 = load float addrspace(3)* %arrayidx0, align 4
75 %idx.1 = add nsw i32 %tid.x, 8
76 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.1
77 %val1 = load float addrspace(3)* %arrayidx1, align 4
78 %sum.0 = fadd float %val0, %val1
80 %idx.2 = add nsw i32 %tid.x, 11
81 %arrayidx2 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.2
82 %val2 = load float addrspace(3)* %arrayidx2, align 4
84 %idx.3 = add nsw i32 %tid.x, 27
85 %arrayidx3 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.3
86 %val3 = load float addrspace(3)* %arrayidx3, align 4
87 %sum.1 = fadd float %val2, %val3
89 %sum = fadd float %sum.0, %sum.1
90 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %idx.0
91 store float %sum, float addrspace(1)* %out.gep, align 4
95 ; Make sure there is an instruction between the two sets of reads.
96 ; SI-LABEL: @simple_read2_f32_x2_barrier
97 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]], 0x0, 0x8
99 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]], 0xb, 0x1b
101 define void @simple_read2_f32_x2_barrier(float addrspace(1)* %out) #0 {
102 %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
103 %idx.0 = add nsw i32 %tid.x, 0
104 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.0
105 %val0 = load float addrspace(3)* %arrayidx0, align 4
107 %idx.1 = add nsw i32 %tid.x, 8
108 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.1
109 %val1 = load float addrspace(3)* %arrayidx1, align 4
110 %sum.0 = fadd float %val0, %val1
112 call void @llvm.AMDGPU.barrier.local() #2
114 %idx.2 = add nsw i32 %tid.x, 11
115 %arrayidx2 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.2
116 %val2 = load float addrspace(3)* %arrayidx2, align 4
118 %idx.3 = add nsw i32 %tid.x, 27
119 %arrayidx3 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.3
120 %val3 = load float addrspace(3)* %arrayidx3, align 4
121 %sum.1 = fadd float %val2, %val3
123 %sum = fadd float %sum.0, %sum.1
124 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %idx.0
125 store float %sum, float addrspace(1)* %out.gep, align 4
129 ; For some reason adding something to the base address for the first
130 ; element results in only folding the inner pair.
132 ; SI-LABEL: @simple_read2_f32_x2_nonzero_base
133 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR:v[0-9]+]], 0x2, 0x8
134 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, [[BASEADDR]], 0xb, 0x1b
136 define void @simple_read2_f32_x2_nonzero_base(float addrspace(1)* %out) #0 {
137 %tid.x = tail call i32 @llvm.r600.read.tidig.x() #1
138 %idx.0 = add nsw i32 %tid.x, 2
139 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.0
140 %val0 = load float addrspace(3)* %arrayidx0, align 4
142 %idx.1 = add nsw i32 %tid.x, 8
143 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.1
144 %val1 = load float addrspace(3)* %arrayidx1, align 4
145 %sum.0 = fadd float %val0, %val1
147 %idx.2 = add nsw i32 %tid.x, 11
148 %arrayidx2 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.2
149 %val2 = load float addrspace(3)* %arrayidx2, align 4
151 %idx.3 = add nsw i32 %tid.x, 27
152 %arrayidx3 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %idx.3
153 %val3 = load float addrspace(3)* %arrayidx3, align 4
154 %sum.1 = fadd float %val2, %val3
156 %sum = fadd float %sum.0, %sum.1
157 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %idx.0
158 store float %sum, float addrspace(1)* %out.gep, align 4
162 ; Be careful of vectors of pointers. We don't know if the 2 pointers
163 ; in the vectors are really the same base, so this is not safe to
165 ; Base pointers come from different subregister of same super
166 ; register. We can't safely merge this.
168 ; SI-LABEL: @read2_ptr_is_subreg_arg_f32
169 ; SI-NOT: DS_READ2_B32
173 define void @read2_ptr_is_subreg_arg_f32(float addrspace(1)* %out, <2 x float addrspace(3)*> %lds.ptr) #0 {
174 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
175 %index.0 = insertelement <2 x i32> undef, i32 %x.i, i32 0
176 %index.1 = insertelement <2 x i32> %index.0, i32 8, i32 0
177 %gep = getelementptr inbounds <2 x float addrspace(3)*> %lds.ptr, <2 x i32> %index.1
178 %gep.0 = extractelement <2 x float addrspace(3)*> %gep, i32 0
179 %gep.1 = extractelement <2 x float addrspace(3)*> %gep, i32 1
180 %val0 = load float addrspace(3)* %gep.0, align 4
181 %val1 = load float addrspace(3)* %gep.1, align 4
182 %add.x = add nsw i32 %x.i, 8
183 %sum = fadd float %val0, %val1
184 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
185 store float %sum, float addrspace(1)* %out.gep, align 4
189 ; Apply a constant scalar offset after the pointer vector extract. We
190 ; are rejecting merges that have the same, constant 0 offset, so make
191 ; sure we are really rejecting it because of the different
194 ; SI-LABEL: @read2_ptr_is_subreg_arg_offset_f32
195 ; SI-NOT: DS_READ2_B32
199 define void @read2_ptr_is_subreg_arg_offset_f32(float addrspace(1)* %out, <2 x float addrspace(3)*> %lds.ptr) #0 {
200 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
201 %index.0 = insertelement <2 x i32> undef, i32 %x.i, i32 0
202 %index.1 = insertelement <2 x i32> %index.0, i32 8, i32 0
203 %gep = getelementptr inbounds <2 x float addrspace(3)*> %lds.ptr, <2 x i32> %index.1
204 %gep.0 = extractelement <2 x float addrspace(3)*> %gep, i32 0
205 %gep.1 = extractelement <2 x float addrspace(3)*> %gep, i32 1
207 ; Apply an additional offset after the vector that will be more obviously folded.
208 %gep.1.offset = getelementptr float addrspace(3)* %gep.1, i32 8
210 %val0 = load float addrspace(3)* %gep.0, align 4
211 %val1 = load float addrspace(3)* %gep.1.offset, align 4
212 %add.x = add nsw i32 %x.i, 8
213 %sum = fadd float %val0, %val1
214 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
215 store float %sum, float addrspace(1)* %out.gep, align 4
219 ; We should be able to merge in this case, but probably not worth the effort.
220 ; SI-NOT: DS_READ2_B32
224 define void @read2_ptr_is_subreg_f32(float addrspace(1)* %out) #0 {
225 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
226 %ptr.0 = insertelement <2 x [512 x float] addrspace(3)*> undef, [512 x float] addrspace(3)* @lds, i32 0
227 %ptr.1 = insertelement <2 x [512 x float] addrspace(3)*> %ptr.0, [512 x float] addrspace(3)* @lds, i32 1
228 %x.i.v.0 = insertelement <2 x i32> undef, i32 %x.i, i32 0
229 %x.i.v.1 = insertelement <2 x i32> %x.i.v.0, i32 %x.i, i32 1
230 %idx = add <2 x i32> %x.i.v.1, <i32 0, i32 8>
231 %gep = getelementptr inbounds <2 x [512 x float] addrspace(3)*> %ptr.1, <2 x i32> <i32 0, i32 0>, <2 x i32> %idx
232 %gep.0 = extractelement <2 x float addrspace(3)*> %gep, i32 0
233 %gep.1 = extractelement <2 x float addrspace(3)*> %gep, i32 1
234 %val0 = load float addrspace(3)* %gep.0, align 4
235 %val1 = load float addrspace(3)* %gep.1, align 4
236 %add.x = add nsw i32 %x.i, 8
237 %sum = fadd float %val0, %val1
238 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
239 store float %sum, float addrspace(1)* %out.gep, align 4
243 ; SI-LABEL: @simple_read2_f32_volatile_0
244 ; SI-NOT DS_READ2_B32
245 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x0
246 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x20
248 define void @simple_read2_f32_volatile_0(float addrspace(1)* %out) #0 {
249 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
250 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
251 %val0 = load volatile float addrspace(3)* %arrayidx0, align 4
252 %add.x = add nsw i32 %x.i, 8
253 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
254 %val1 = load float addrspace(3)* %arrayidx1, align 4
255 %sum = fadd float %val0, %val1
256 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
257 store float %sum, float addrspace(1)* %out.gep, align 4
261 ; SI-LABEL: @simple_read2_f32_volatile_1
262 ; SI-NOT DS_READ2_B32
263 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x0
264 ; SI: DS_READ_B32 v{{[0-9]+}}, v{{[0-9]+}}, 0x20
266 define void @simple_read2_f32_volatile_1(float addrspace(1)* %out) #0 {
267 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
268 %arrayidx0 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %x.i
269 %val0 = load float addrspace(3)* %arrayidx0, align 4
270 %add.x = add nsw i32 %x.i, 8
271 %arrayidx1 = getelementptr inbounds [512 x float] addrspace(3)* @lds, i32 0, i32 %add.x
272 %val1 = load volatile float addrspace(3)* %arrayidx1, align 4
273 %sum = fadd float %val0, %val1
274 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
275 store float %sum, float addrspace(1)* %out.gep, align 4
279 ; Can't fold since not correctly aligned.
280 ; XXX: This isn't really testing anything useful now. I think CI
281 ; allows unaligned LDS accesses, which would be a problem here.
282 ; SI-LABEL: @unaligned_read2_f32
283 ; SI-NOT: DS_READ2_B32
285 define void @unaligned_read2_f32(float addrspace(1)* %out, float addrspace(3)* %lds) #0 {
286 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
287 %arrayidx0 = getelementptr inbounds float addrspace(3)* %lds, i32 %x.i
288 %val0 = load float addrspace(3)* %arrayidx0, align 1
289 %add.x = add nsw i32 %x.i, 8
290 %arrayidx1 = getelementptr inbounds float addrspace(3)* %lds, i32 %add.x
291 %val1 = load float addrspace(3)* %arrayidx1, align 1
292 %sum = fadd float %val0, %val1
293 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
294 store float %sum, float addrspace(1)* %out.gep, align 4
298 ; SI-LABEL: @misaligned_2_simple_read2_f32
299 ; SI-NOT: DS_READ2_B32
301 define void @misaligned_2_simple_read2_f32(float addrspace(1)* %out, float addrspace(3)* %lds) #0 {
302 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
303 %arrayidx0 = getelementptr inbounds float addrspace(3)* %lds, i32 %x.i
304 %val0 = load float addrspace(3)* %arrayidx0, align 2
305 %add.x = add nsw i32 %x.i, 8
306 %arrayidx1 = getelementptr inbounds float addrspace(3)* %lds, i32 %add.x
307 %val1 = load float addrspace(3)* %arrayidx1, align 2
308 %sum = fadd float %val0, %val1
309 %out.gep = getelementptr inbounds float addrspace(1)* %out, i32 %x.i
310 store float %sum, float addrspace(1)* %out.gep, align 4
314 ; SI-LABEL: @simple_read2_f64
315 ; SI: V_LSHLREV_B32_e32 [[VPTR:v[0-9]+]], 3, {{v[0-9]+}}
316 ; SI: DS_READ2_B64 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, [[VPTR]], 0x0, 0x8
317 ; SI: V_ADD_F64 [[RESULT:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO_VREG]]:{{[0-9]+\]}}, v{{\[[0-9]+}}:[[HI_VREG]]{{\]}}
318 ; SI: BUFFER_STORE_DWORDX2 [[RESULT]]
320 define void @simple_read2_f64(double addrspace(1)* %out) #0 {
321 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
322 %arrayidx0 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %x.i
323 %val0 = load double addrspace(3)* %arrayidx0, align 8
324 %add.x = add nsw i32 %x.i, 8
325 %arrayidx1 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %add.x
326 %val1 = load double addrspace(3)* %arrayidx1, align 8
327 %sum = fadd double %val0, %val1
328 %out.gep = getelementptr inbounds double addrspace(1)* %out, i32 %x.i
329 store double %sum, double addrspace(1)* %out.gep, align 8
333 ; SI-LABEL: @simple_read2_f64_max_offset
334 ; SI: DS_READ2_B64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 0x0, 0xff
336 define void @simple_read2_f64_max_offset(double addrspace(1)* %out) #0 {
337 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
338 %arrayidx0 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %x.i
339 %val0 = load double addrspace(3)* %arrayidx0, align 8
340 %add.x = add nsw i32 %x.i, 255
341 %arrayidx1 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %add.x
342 %val1 = load double addrspace(3)* %arrayidx1, align 8
343 %sum = fadd double %val0, %val1
344 %out.gep = getelementptr inbounds double addrspace(1)* %out, i32 %x.i
345 store double %sum, double addrspace(1)* %out.gep, align 8
349 ; SI-LABEL: @simple_read2_f64_too_far
350 ; SI-NOT DS_READ2_B64
351 ; SI: DS_READ_B64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 0x0
352 ; SI: DS_READ_B64 {{v\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, 0x808
354 define void @simple_read2_f64_too_far(double addrspace(1)* %out) #0 {
355 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
356 %arrayidx0 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %x.i
357 %val0 = load double addrspace(3)* %arrayidx0, align 8
358 %add.x = add nsw i32 %x.i, 257
359 %arrayidx1 = getelementptr inbounds [512 x double] addrspace(3)* @lds.f64, i32 0, i32 %add.x
360 %val1 = load double addrspace(3)* %arrayidx1, align 8
361 %sum = fadd double %val0, %val1
362 %out.gep = getelementptr inbounds double addrspace(1)* %out, i32 %x.i
363 store double %sum, double addrspace(1)* %out.gep, align 8
368 ; SI-LABEL: @misaligned_read2_f64
369 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, 0x0, 0x1
370 ; SI: DS_READ2_B32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}}, 0xe, 0xf
372 define void @misaligned_read2_f64(double addrspace(1)* %out, double addrspace(3)* %lds) #0 {
373 %x.i = tail call i32 @llvm.r600.read.tidig.x() #1
374 %arrayidx0 = getelementptr inbounds double addrspace(3)* %lds, i32 %x.i
375 %val0 = load double addrspace(3)* %arrayidx0, align 4
376 %add.x = add nsw i32 %x.i, 7
377 %arrayidx1 = getelementptr inbounds double addrspace(3)* %lds, i32 %add.x
378 %val1 = load double addrspace(3)* %arrayidx1, align 4
379 %sum = fadd double %val0, %val1
380 %out.gep = getelementptr inbounds double addrspace(1)* %out, i32 %x.i
381 store double %sum, double addrspace(1)* %out.gep, align 4
385 @sgemm.lA = internal unnamed_addr addrspace(3) global [264 x float] zeroinitializer, align 4
386 @sgemm.lB = internal unnamed_addr addrspace(3) global [776 x float] zeroinitializer, align 4
388 define void @sgemm_inner_loop_read2_sequence(float addrspace(1)* %C, i32 %lda, i32 %ldb) #0 {
389 %x.i = tail call i32 @llvm.r600.read.tgid.x() #1
390 %y.i = tail call i32 @llvm.r600.read.tidig.y() #1
391 %arrayidx44 = getelementptr inbounds [264 x float] addrspace(3)* @sgemm.lA, i32 0, i32 %x.i
392 %tmp16 = load float addrspace(3)* %arrayidx44, align 4
393 %add47 = add nsw i32 %x.i, 1
394 %arrayidx48 = getelementptr inbounds [264 x float] addrspace(3)* @sgemm.lA, i32 0, i32 %add47
395 %tmp17 = load float addrspace(3)* %arrayidx48, align 4
396 %add51 = add nsw i32 %x.i, 16
397 %arrayidx52 = getelementptr inbounds [264 x float] addrspace(3)* @sgemm.lA, i32 0, i32 %add51
398 %tmp18 = load float addrspace(3)* %arrayidx52, align 4
399 %add55 = add nsw i32 %x.i, 17
400 %arrayidx56 = getelementptr inbounds [264 x float] addrspace(3)* @sgemm.lA, i32 0, i32 %add55
401 %tmp19 = load float addrspace(3)* %arrayidx56, align 4
402 %arrayidx60 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %y.i
403 %tmp20 = load float addrspace(3)* %arrayidx60, align 4
404 %add63 = add nsw i32 %y.i, 1
405 %arrayidx64 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %add63
406 %tmp21 = load float addrspace(3)* %arrayidx64, align 4
407 %add67 = add nsw i32 %y.i, 32
408 %arrayidx68 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %add67
409 %tmp22 = load float addrspace(3)* %arrayidx68, align 4
410 %add71 = add nsw i32 %y.i, 33
411 %arrayidx72 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %add71
412 %tmp23 = load float addrspace(3)* %arrayidx72, align 4
413 %add75 = add nsw i32 %y.i, 64
414 %arrayidx76 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %add75
415 %tmp24 = load float addrspace(3)* %arrayidx76, align 4
416 %add79 = add nsw i32 %y.i, 65
417 %arrayidx80 = getelementptr inbounds [776 x float] addrspace(3)* @sgemm.lB, i32 0, i32 %add79
418 %tmp25 = load float addrspace(3)* %arrayidx80, align 4
419 %sum.0 = fadd float %tmp16, %tmp17
420 %sum.1 = fadd float %sum.0, %tmp18
421 %sum.2 = fadd float %sum.1, %tmp19
422 %sum.3 = fadd float %sum.2, %tmp20
423 %sum.4 = fadd float %sum.3, %tmp21
424 %sum.5 = fadd float %sum.4, %tmp22
425 %sum.6 = fadd float %sum.5, %tmp23
426 %sum.7 = fadd float %sum.6, %tmp24
427 %sum.8 = fadd float %sum.7, %tmp25
428 store float %sum.8, float addrspace(1)* %C, align 4
432 define void @misaligned_read2_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(3)* %in) #0 {
433 %load = load <2 x i32> addrspace(3)* %in, align 4
434 store <2 x i32> %load, <2 x i32> addrspace(1)* %out, align 8
438 define void @misaligned_read2_i64(i64 addrspace(1)* %out, i64 addrspace(3)* %in) #0 {
439 %load = load i64 addrspace(3)* %in, align 4
440 store i64 %load, i64 addrspace(1)* %out, align 8
444 ; Function Attrs: nounwind readnone
445 declare i32 @llvm.r600.read.tgid.x() #1
447 ; Function Attrs: nounwind readnone
448 declare i32 @llvm.r600.read.tgid.y() #1
450 ; Function Attrs: nounwind readnone
451 declare i32 @llvm.r600.read.tidig.x() #1
453 ; Function Attrs: nounwind readnone
454 declare i32 @llvm.r600.read.tidig.y() #1
456 ; Function Attrs: noduplicate nounwind
457 declare void @llvm.AMDGPU.barrier.local() #2
459 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
460 attributes #1 = { nounwind readnone }
461 attributes #2 = { noduplicate nounwind }