1 ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2 ; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
4 declare i32 @llvm.ctpop.i32(i32) nounwind readnone
5 declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) nounwind readnone
6 declare <4 x i32> @llvm.ctpop.v4i32(<4 x i32>) nounwind readnone
7 declare <8 x i32> @llvm.ctpop.v8i32(<8 x i32>) nounwind readnone
8 declare <16 x i32> @llvm.ctpop.v16i32(<16 x i32>) nounwind readnone
10 ; FUNC-LABEL: {{^}}s_ctpop_i32:
11 ; SI: s_load_dword [[SVAL:s[0-9]+]],
12 ; SI: s_bcnt1_i32_b32 [[SRESULT:s[0-9]+]], [[SVAL]]
13 ; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[SRESULT]]
14 ; SI: buffer_store_dword [[VRESULT]],
18 define void @s_ctpop_i32(i32 addrspace(1)* noalias %out, i32 %val) nounwind {
19 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
20 store i32 %ctpop, i32 addrspace(1)* %out, align 4
24 ; XXX - Why 0 in register?
25 ; FUNC-LABEL: {{^}}v_ctpop_i32:
26 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
27 ; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0
28 ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL]], [[VZERO]]
29 ; SI: buffer_store_dword [[RESULT]],
33 define void @v_ctpop_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
34 %val = load i32 addrspace(1)* %in, align 4
35 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
36 store i32 %ctpop, i32 addrspace(1)* %out, align 4
40 ; FUNC-LABEL: {{^}}v_ctpop_add_chain_i32:
41 ; SI: buffer_load_dword [[VAL0:v[0-9]+]],
42 ; SI: buffer_load_dword [[VAL1:v[0-9]+]],
43 ; SI: v_mov_b32_e32 [[VZERO:v[0-9]+]], 0
44 ; SI: v_bcnt_u32_b32_e32 [[MIDRESULT:v[0-9]+]], [[VAL1]], [[VZERO]]
45 ; SI-NEXT: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL0]], [[MIDRESULT]]
46 ; SI: buffer_store_dword [[RESULT]],
51 define void @v_ctpop_add_chain_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in0, i32 addrspace(1)* noalias %in1) nounwind {
52 %val0 = load i32 addrspace(1)* %in0, align 4
53 %val1 = load i32 addrspace(1)* %in1, align 4
54 %ctpop0 = call i32 @llvm.ctpop.i32(i32 %val0) nounwind readnone
55 %ctpop1 = call i32 @llvm.ctpop.i32(i32 %val1) nounwind readnone
56 %add = add i32 %ctpop0, %ctpop1
57 store i32 %add, i32 addrspace(1)* %out, align 4
61 ; FUNC-LABEL: {{^}}v_ctpop_add_sgpr_i32:
62 ; SI: buffer_load_dword [[VAL0:v[0-9]+]],
64 ; SI-NEXT: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL0]], s{{[0-9]+}}
65 ; SI-NEXT: buffer_store_dword [[RESULT]],
67 define void @v_ctpop_add_sgpr_i32(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in0, i32 addrspace(1)* noalias %in1, i32 %sval) nounwind {
68 %val0 = load i32 addrspace(1)* %in0, align 4
69 %ctpop0 = call i32 @llvm.ctpop.i32(i32 %val0) nounwind readnone
70 %add = add i32 %ctpop0, %sval
71 store i32 %add, i32 addrspace(1)* %out, align 4
75 ; FUNC-LABEL: {{^}}v_ctpop_v2i32:
76 ; SI: v_bcnt_u32_b32_e32
77 ; SI: v_bcnt_u32_b32_e32
82 define void @v_ctpop_v2i32(<2 x i32> addrspace(1)* noalias %out, <2 x i32> addrspace(1)* noalias %in) nounwind {
83 %val = load <2 x i32> addrspace(1)* %in, align 8
84 %ctpop = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %val) nounwind readnone
85 store <2 x i32> %ctpop, <2 x i32> addrspace(1)* %out, align 8
89 ; FUNC-LABEL: {{^}}v_ctpop_v4i32:
90 ; SI: v_bcnt_u32_b32_e32
91 ; SI: v_bcnt_u32_b32_e32
92 ; SI: v_bcnt_u32_b32_e32
93 ; SI: v_bcnt_u32_b32_e32
100 define void @v_ctpop_v4i32(<4 x i32> addrspace(1)* noalias %out, <4 x i32> addrspace(1)* noalias %in) nounwind {
101 %val = load <4 x i32> addrspace(1)* %in, align 16
102 %ctpop = call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %val) nounwind readnone
103 store <4 x i32> %ctpop, <4 x i32> addrspace(1)* %out, align 16
107 ; FUNC-LABEL: {{^}}v_ctpop_v8i32:
108 ; SI: v_bcnt_u32_b32_e32
109 ; SI: v_bcnt_u32_b32_e32
110 ; SI: v_bcnt_u32_b32_e32
111 ; SI: v_bcnt_u32_b32_e32
112 ; SI: v_bcnt_u32_b32_e32
113 ; SI: v_bcnt_u32_b32_e32
114 ; SI: v_bcnt_u32_b32_e32
115 ; SI: v_bcnt_u32_b32_e32
126 define void @v_ctpop_v8i32(<8 x i32> addrspace(1)* noalias %out, <8 x i32> addrspace(1)* noalias %in) nounwind {
127 %val = load <8 x i32> addrspace(1)* %in, align 32
128 %ctpop = call <8 x i32> @llvm.ctpop.v8i32(<8 x i32> %val) nounwind readnone
129 store <8 x i32> %ctpop, <8 x i32> addrspace(1)* %out, align 32
133 ; FUNC-LABEL: {{^}}v_ctpop_v16i32:
134 ; SI: v_bcnt_u32_b32_e32
135 ; SI: v_bcnt_u32_b32_e32
136 ; SI: v_bcnt_u32_b32_e32
137 ; SI: v_bcnt_u32_b32_e32
138 ; SI: v_bcnt_u32_b32_e32
139 ; SI: v_bcnt_u32_b32_e32
140 ; SI: v_bcnt_u32_b32_e32
141 ; SI: v_bcnt_u32_b32_e32
142 ; SI: v_bcnt_u32_b32_e32
143 ; SI: v_bcnt_u32_b32_e32
144 ; SI: v_bcnt_u32_b32_e32
145 ; SI: v_bcnt_u32_b32_e32
146 ; SI: v_bcnt_u32_b32_e32
147 ; SI: v_bcnt_u32_b32_e32
148 ; SI: v_bcnt_u32_b32_e32
149 ; SI: v_bcnt_u32_b32_e32
168 define void @v_ctpop_v16i32(<16 x i32> addrspace(1)* noalias %out, <16 x i32> addrspace(1)* noalias %in) nounwind {
169 %val = load <16 x i32> addrspace(1)* %in, align 32
170 %ctpop = call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %val) nounwind readnone
171 store <16 x i32> %ctpop, <16 x i32> addrspace(1)* %out, align 32
175 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_inline_constant:
176 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
177 ; SI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 4
178 ; SI: buffer_store_dword [[RESULT]],
182 define void @v_ctpop_i32_add_inline_constant(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
183 %val = load i32 addrspace(1)* %in, align 4
184 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
185 %add = add i32 %ctpop, 4
186 store i32 %add, i32 addrspace(1)* %out, align 4
190 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_inline_constant_inv:
191 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
192 ; SI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], 4
193 ; SI: buffer_store_dword [[RESULT]],
197 define void @v_ctpop_i32_add_inline_constant_inv(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
198 %val = load i32 addrspace(1)* %in, align 4
199 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
200 %add = add i32 4, %ctpop
201 store i32 %add, i32 addrspace(1)* %out, align 4
205 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_literal:
206 ; SI: buffer_load_dword [[VAL:v[0-9]+]],
207 ; SI: v_mov_b32_e32 [[LIT:v[0-9]+]], 0x1869f
208 ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL]], [[LIT]]
209 ; SI: buffer_store_dword [[RESULT]],
211 define void @v_ctpop_i32_add_literal(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in) nounwind {
212 %val = load i32 addrspace(1)* %in, align 4
213 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
214 %add = add i32 %ctpop, 99999
215 store i32 %add, i32 addrspace(1)* %out, align 4
219 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_var:
220 ; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]],
221 ; SI-DAG: s_load_dword [[VAR:s[0-9]+]],
222 ; SI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], [[VAR]]
223 ; SI: buffer_store_dword [[RESULT]],
227 define void @v_ctpop_i32_add_var(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %const) nounwind {
228 %val = load i32 addrspace(1)* %in, align 4
229 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
230 %add = add i32 %ctpop, %const
231 store i32 %add, i32 addrspace(1)* %out, align 4
235 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_var_inv:
236 ; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]],
237 ; SI-DAG: s_load_dword [[VAR:s[0-9]+]],
238 ; SI: v_bcnt_u32_b32_e64 [[RESULT:v[0-9]+]], [[VAL]], [[VAR]]
239 ; SI: buffer_store_dword [[RESULT]],
243 define void @v_ctpop_i32_add_var_inv(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %const) nounwind {
244 %val = load i32 addrspace(1)* %in, align 4
245 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
246 %add = add i32 %const, %ctpop
247 store i32 %add, i32 addrspace(1)* %out, align 4
251 ; FUNC-LABEL: {{^}}v_ctpop_i32_add_vvar_inv:
252 ; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]], s[{{[0-9]+:[0-9]+}}], {{0$}}
253 ; SI-DAG: buffer_load_dword [[VAR:v[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0 offset:0x10
254 ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAL]], [[VAR]]
255 ; SI: buffer_store_dword [[RESULT]],
259 define void @v_ctpop_i32_add_vvar_inv(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 addrspace(1)* noalias %constptr) nounwind {
260 %val = load i32 addrspace(1)* %in, align 4
261 %ctpop = call i32 @llvm.ctpop.i32(i32 %val) nounwind readnone
262 %gep = getelementptr i32 addrspace(1)* %constptr, i32 4
263 %const = load i32 addrspace(1)* %gep, align 4
264 %add = add i32 %const, %ctpop
265 store i32 %add, i32 addrspace(1)* %out, align 4
269 ; FIXME: We currently disallow SALU instructions in all branches,
270 ; but there are some cases when the should be allowed.
272 ; FUNC-LABEL: {{^}}ctpop_i32_in_br:
273 ; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xd
274 ; SI: s_bcnt1_i32_b32 [[SRESULT:s[0-9]+]], [[VAL]]
275 ; SI: v_mov_b32_e32 [[RESULT]], [[SRESULT]]
276 ; SI: buffer_store_dword [[RESULT]],
279 define void @ctpop_i32_in_br(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i32 %ctpop_arg, i32 %cond) {
281 %tmp0 = icmp eq i32 %cond, 0
282 br i1 %tmp0, label %if, label %else
285 %tmp2 = call i32 @llvm.ctpop.i32(i32 %ctpop_arg)
289 %tmp3 = getelementptr i32 addrspace(1)* %in, i32 1
290 %tmp4 = load i32 addrspace(1)* %tmp3
294 %tmp5 = phi i32 [%tmp2, %if], [%tmp4, %else]
295 store i32 %tmp5, i32 addrspace(1)* %out