1 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck %s
2 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-REG %s
3 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCheck %s
4 ; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu -mattr=+vsx -fast-isel -O0 < %s | FileCheck -check-prefix=CHECK-FISL %s
5 ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-LE %s
7 define double @test1(double %a, double %b) {
9 %v = fmul double %a, %b
13 ; CHECK: xsmuldp 1, 1, 2
16 ; CHECK-LE-LABEL: @test1
17 ; CHECK-LE: xsmuldp 1, 1, 2
21 define double @test2(double %a, double %b) {
23 %v = fdiv double %a, %b
27 ; CHECK: xsdivdp 1, 1, 2
30 ; CHECK-LE-LABEL: @test2
31 ; CHECK-LE: xsdivdp 1, 1, 2
35 define double @test3(double %a, double %b) {
37 %v = fadd double %a, %b
41 ; CHECK: xsadddp 1, 1, 2
44 ; CHECK-LE-LABEL: @test3
45 ; CHECK-LE: xsadddp 1, 1, 2
49 define <2 x double> @test4(<2 x double> %a, <2 x double> %b) {
51 %v = fadd <2 x double> %a, %b
55 ; CHECK: xvadddp 34, 34, 35
58 ; CHECK-LE-LABEL: @test4
59 ; CHECK-LE: xvadddp 34, 34, 35
63 define <4 x i32> @test5(<4 x i32> %a, <4 x i32> %b) {
65 %v = xor <4 x i32> %a, %b
68 ; CHECK-REG-LABEL: @test5
69 ; CHECK-REG: xxlxor 34, 34, 35
72 ; CHECK-FISL-LABEL: @test5
73 ; CHECK-FISL: vor 4, 2, 2
74 ; CHECK-FISL: vor 5, 3, 3
75 ; CHECK-FISL: xxlxor 36, 36, 37
76 ; CHECK-FISL: vor 2, 4, 4
79 ; CHECK-LE-LABEL: @test5
80 ; CHECK-LE: xxlxor 34, 34, 35
84 define <8 x i16> @test6(<8 x i16> %a, <8 x i16> %b) {
86 %v = xor <8 x i16> %a, %b
89 ; CHECK-REG-LABEL: @test6
90 ; CHECK-REG: xxlxor 34, 34, 35
93 ; CHECK-FISL-LABEL: @test6
94 ; CHECK-FISL: vor 4, 2, 2
95 ; CHECK-FISL: vor 5, 3, 3
96 ; CHECK-FISL: xxlxor 36, 36, 37
97 ; CHECK-FISL: vor 2, 4, 4
100 ; CHECK-LE-LABEL: @test6
101 ; CHECK-LE: xxlxor 34, 34, 35
105 define <16 x i8> @test7(<16 x i8> %a, <16 x i8> %b) {
107 %v = xor <16 x i8> %a, %b
110 ; CHECK-REG-LABEL: @test7
111 ; CHECK-REG: xxlxor 34, 34, 35
114 ; CHECK-FISL-LABEL: @test7
115 ; CHECK-FISL: vor 4, 2, 2
116 ; CHECK-FISL: vor 5, 3, 3
117 ; CHECK-FISL: xxlxor 36, 36, 37
118 ; CHECK-FISL: vor 2, 4, 4
121 ; CHECK-LE-LABEL: @test7
122 ; CHECK-LE: xxlxor 34, 34, 35
126 define <4 x i32> @test8(<4 x i32> %a, <4 x i32> %b) {
128 %v = or <4 x i32> %a, %b
131 ; CHECK-REG-LABEL: @test8
132 ; CHECK-REG: xxlor 34, 34, 35
135 ; CHECK-FISL-LABEL: @test8
136 ; CHECK-FISL: vor 4, 2, 2
137 ; CHECK-FISL: vor 5, 3, 3
138 ; CHECK-FISL: xxlor 36, 36, 37
139 ; CHECK-FISL: vor 2, 4, 4
142 ; CHECK-LE-LABEL: @test8
143 ; CHECK-LE: xxlor 34, 34, 35
147 define <8 x i16> @test9(<8 x i16> %a, <8 x i16> %b) {
149 %v = or <8 x i16> %a, %b
152 ; CHECK-REG-LABEL: @test9
153 ; CHECK-REG: xxlor 34, 34, 35
156 ; CHECK-FISL-LABEL: @test9
157 ; CHECK-FISL: vor 4, 2, 2
158 ; CHECK-FISL: vor 5, 3, 3
159 ; CHECK-FISL: xxlor 36, 36, 37
160 ; CHECK-FISL: vor 2, 4, 4
163 ; CHECK-LE-LABEL: @test9
164 ; CHECK-LE: xxlor 34, 34, 35
168 define <16 x i8> @test10(<16 x i8> %a, <16 x i8> %b) {
170 %v = or <16 x i8> %a, %b
173 ; CHECK-REG-LABEL: @test10
174 ; CHECK-REG: xxlor 34, 34, 35
177 ; CHECK-FISL-LABEL: @test10
178 ; CHECK-FISL: vor 4, 2, 2
179 ; CHECK-FISL: vor 5, 3, 3
180 ; CHECK-FISL: xxlor 36, 36, 37
181 ; CHECK-FISL: vor 2, 4, 4
184 ; CHECK-LE-LABEL: @test10
185 ; CHECK-LE: xxlor 34, 34, 35
189 define <4 x i32> @test11(<4 x i32> %a, <4 x i32> %b) {
191 %v = and <4 x i32> %a, %b
194 ; CHECK-REG-LABEL: @test11
195 ; CHECK-REG: xxland 34, 34, 35
198 ; CHECK-FISL-LABEL: @test11
199 ; CHECK-FISL: vor 4, 2, 2
200 ; CHECK-FISL: vor 5, 3, 3
201 ; CHECK-FISL: xxland 36, 36, 37
202 ; CHECK-FISL: vor 2, 4, 4
205 ; CHECK-LE-LABEL: @test11
206 ; CHECK-LE: xxland 34, 34, 35
210 define <8 x i16> @test12(<8 x i16> %a, <8 x i16> %b) {
212 %v = and <8 x i16> %a, %b
215 ; CHECK-REG-LABEL: @test12
216 ; CHECK-REG: xxland 34, 34, 35
219 ; CHECK-FISL-LABEL: @test12
220 ; CHECK-FISL: vor 4, 2, 2
221 ; CHECK-FISL: vor 5, 3, 3
222 ; CHECK-FISL: xxland 36, 36, 37
223 ; CHECK-FISL: vor 2, 4, 4
226 ; CHECK-LE-LABEL: @test12
227 ; CHECK-LE: xxland 34, 34, 35
231 define <16 x i8> @test13(<16 x i8> %a, <16 x i8> %b) {
233 %v = and <16 x i8> %a, %b
236 ; CHECK-REG-LABEL: @test13
237 ; CHECK-REG: xxland 34, 34, 35
240 ; CHECK-FISL-LABEL: @test13
241 ; CHECK-FISL: vor 4, 2, 2
242 ; CHECK-FISL: vor 5, 3, 3
243 ; CHECK-FISL: xxland 36, 36, 37
244 ; CHECK-FISL: vor 2, 4, 4
247 ; CHECK-LE-LABEL: @test13
248 ; CHECK-LE: xxland 34, 34, 35
252 define <4 x i32> @test14(<4 x i32> %a, <4 x i32> %b) {
254 %v = or <4 x i32> %a, %b
255 %w = xor <4 x i32> %v, <i32 -1, i32 -1, i32 -1, i32 -1>
258 ; CHECK-REG-LABEL: @test14
259 ; CHECK-REG: xxlnor 34, 34, 35
262 ; CHECK-FISL-LABEL: @test14
263 ; CHECK-FISL: vor 4, 2, 2
264 ; CHECK-FISL: vor 5, 3, 3
265 ; CHECK-FISL: xxlor 36, 36, 37
266 ; CHECK-FISL: vor 0, 4, 4
267 ; CHECK-FISL: vor 4, 2, 2
268 ; CHECK-FISL: vor 5, 3, 3
269 ; CHECK-FISL: xxlnor 36, 36, 37
270 ; CHECK-FISL: vor 2, 4, 4
271 ; CHECK-FISL: lis 0, -1
272 ; CHECK-FISL: ori 0, 0, 65520
273 ; CHECK-FISL: stvx 0, 1, 0
276 ; CHECK-LE-LABEL: @test14
277 ; CHECK-LE: xxlnor 34, 34, 35
281 define <8 x i16> @test15(<8 x i16> %a, <8 x i16> %b) {
283 %v = or <8 x i16> %a, %b
284 %w = xor <8 x i16> %v, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
287 ; CHECK-REG-LABEL: @test15
288 ; CHECK-REG: xxlnor 34, 34, 35
291 ; CHECK-FISL-LABEL: @test15
292 ; CHECK-FISL: vor 4, 2, 2
293 ; CHECK-FISL: vor 5, 3, 3
294 ; CHECK-FISL: xxlor 36, 36, 37
295 ; CHECK-FISL: vor 0, 4, 4
296 ; CHECK-FISL: vor 4, 2, 2
297 ; CHECK-FISL: vor 5, 3, 3
298 ; CHECK-FISL: xxlnor 36, 36, 37
299 ; CHECK-FISL: vor 2, 4, 4
300 ; CHECK-FISL: lis 0, -1
301 ; CHECK-FISL: ori 0, 0, 65520
302 ; CHECK-FISL: stvx 0, 1, 0
305 ; CHECK-LE-LABEL: @test15
306 ; CHECK-LE: xxlnor 34, 34, 35
310 define <16 x i8> @test16(<16 x i8> %a, <16 x i8> %b) {
312 %v = or <16 x i8> %a, %b
313 %w = xor <16 x i8> %v, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
316 ; CHECK-REG-LABEL: @test16
317 ; CHECK-REG: xxlnor 34, 34, 35
320 ; CHECK-FISL-LABEL: @test16
321 ; CHECK-FISL: vor 4, 2, 2
322 ; CHECK-FISL: vor 5, 3, 3
323 ; CHECK-FISL: xxlor 36, 36, 37
324 ; CHECK-FISL: vor 0, 4, 4
325 ; CHECK-FISL: vor 4, 2, 2
326 ; CHECK-FISL: vor 5, 3, 3
327 ; CHECK-FISL: xxlnor 36, 36, 37
328 ; CHECK-FISL: vor 2, 4, 4
329 ; CHECK-FISL: lis 0, -1
330 ; CHECK-FISL: ori 0, 0, 65520
331 ; CHECK-FISL: stvx 0, 1, 0
334 ; CHECK-LE-LABEL: @test16
335 ; CHECK-LE: xxlnor 34, 34, 35
339 define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
341 %w = xor <4 x i32> %b, <i32 -1, i32 -1, i32 -1, i32 -1>
342 %v = and <4 x i32> %a, %w
345 ; CHECK-REG-LABEL: @test17
346 ; CHECK-REG: xxlandc 34, 34, 35
349 ; CHECK-FISL-LABEL: @test17
350 ; CHECK-FISL: vspltisb 4, -1
351 ; CHECK-FISL: vor 5, 3, 3
352 ; CHECK-FISL: vor 0, 4, 4
353 ; CHECK-FISL: xxlxor 37, 37, 32
354 ; CHECK-FISL: vor 3, 5, 5
355 ; CHECK-FISL: vor 5, 2, 2
356 ; CHECK-FISL: vor 0, 3, 3
357 ; CHECK-FISL: xxland 37, 37, 32
358 ; CHECK-FISL: vor 2, 5, 5
361 ; CHECK-LE-LABEL: @test17
362 ; CHECK-LE: xxlandc 34, 34, 35
366 define <8 x i16> @test18(<8 x i16> %a, <8 x i16> %b) {
368 %w = xor <8 x i16> %b, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
369 %v = and <8 x i16> %a, %w
372 ; CHECK-REG-LABEL: @test18
373 ; CHECK-REG: xxlandc 34, 34, 35
376 ; CHECK-FISL-LABEL: @test18
377 ; CHECK-FISL: vspltisb 4, -1
378 ; CHECK-FISL: vor 5, 3, 3
379 ; CHECK-FISL: vor 0, 4, 4
380 ; CHECK-FISL: xxlxor 37, 37, 32
381 ; CHECK-FISL: vor 4, 5, 5
382 ; CHECK-FISL: vor 5, 2, 2
383 ; CHECK-FISL: vor 0, 3, 3
384 ; CHECK-FISL: xxlandc 37, 37, 32
385 ; CHECK-FISL: vor 2, 5, 5
386 ; CHECK-FISL: lis 0, -1
387 ; CHECK-FISL: ori 0, 0, 65520
388 ; CHECK-FISL: stvx 4, 1, 0
391 ; CHECK-LE-LABEL: @test18
392 ; CHECK-LE: xxlandc 34, 34, 35
396 define <16 x i8> @test19(<16 x i8> %a, <16 x i8> %b) {
398 %w = xor <16 x i8> %b, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
399 %v = and <16 x i8> %a, %w
402 ; CHECK-REG-LABEL: @test19
403 ; CHECK-REG: xxlandc 34, 34, 35
406 ; CHECK-FISL-LABEL: @test19
407 ; CHECK-FISL: vspltisb 4, -1
408 ; CHECK-FISL: vor 5, 3, 3
409 ; CHECK-FISL: vor 0, 4, 4
410 ; CHECK-FISL: xxlxor 37, 37, 32
411 ; CHECK-FISL: vor 4, 5, 5
412 ; CHECK-FISL: vor 5, 2, 2
413 ; CHECK-FISL: vor 0, 3, 3
414 ; CHECK-FISL: xxlandc 37, 37, 32
415 ; CHECK-FISL: vor 2, 5, 5
416 ; CHECK-FISL: lis 0, -1
417 ; CHECK-FISL: ori 0, 0, 65520
418 ; CHECK-FISL: stvx 4, 1, 0
421 ; CHECK-LE-LABEL: @test19
422 ; CHECK-LE: xxlandc 34, 34, 35
426 define <4 x i32> @test20(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
428 %m = icmp eq <4 x i32> %c, %d
429 %v = select <4 x i1> %m, <4 x i32> %a, <4 x i32> %b
432 ; CHECK-REG-LABEL: @test20
433 ; CHECK-REG: vcmpequw {{[0-9]+}}, 4, 5
434 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
437 ; CHECK-FISL-LABEL: @test20
438 ; CHECK-FISL: vcmpequw 4, 4, 5
439 ; CHECK-FISL: vor 0, 3, 3
440 ; CHECK-FISL: vor 1, 2, 2
441 ; CHECK-FISL: vor 6, 4, 4
442 ; CHECK-FISL: xxsel 32, 32, 33, 38
443 ; CHECK-FISL: vor 2, 0, 0
446 ; CHECK-LE-LABEL: @test20
447 ; CHECK-LE: vcmpequw {{[0-9]+}}, 4, 5
448 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
452 define <4 x float> @test21(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
454 %m = fcmp oeq <4 x float> %c, %d
455 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
458 ; CHECK-REG-LABEL: @test21
459 ; CHECK-REG: xvcmpeqsp [[V1:[0-9]+]], 36, 37
460 ; CHECK-REG: xxsel 34, 35, 34, [[V1]]
463 ; CHECK-FISL-LABEL: @test21
464 ; CHECK-FISL: vor 0, 5, 5
465 ; CHECK-FISL: vor 1, 4, 4
466 ; CHECK-FISL: vor 6, 3, 3
467 ; CHECK-FISL: vor 7, 2, 2
468 ; CHECK-FISL: xvcmpeqsp 32, 33, 32
469 ; CHECK-FISL: xxsel 32, 38, 39, 32
470 ; CHECK-FISL: vor 2, 0, 0
473 ; CHECK-LE-LABEL: @test21
474 ; CHECK-LE: xvcmpeqsp [[V1:[0-9]+]], 36, 37
475 ; CHECK-LE: xxsel 34, 35, 34, [[V1]]
479 define <4 x float> @test22(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
481 %m = fcmp ueq <4 x float> %c, %d
482 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b
485 ; CHECK-REG-LABEL: @test22
486 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 37, 37
487 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 36
488 ; CHECK-REG-DAG: xvcmpeqsp {{[0-9]+}}, 36, 37
489 ; CHECK-REG-DAG: xxlnor
490 ; CHECK-REG-DAG: xxlnor
491 ; CHECK-REG-DAG: xxlor
492 ; CHECK-REG-DAG: xxlor
493 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
496 ; CHECK-FISL-LABEL: @test22
497 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 32
498 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 32, 32
499 ; CHECK-FISL-DAG: xvcmpeqsp {{[0-9]+}}, 33, 33
500 ; CHECK-FISL-DAG: xxlnor
501 ; CHECK-FISL-DAG: xxlnor
502 ; CHECK-FISL-DAG: xxlor
503 ; CHECK-FISL-DAG: xxlor
504 ; CHECK-FISL: xxsel 0, 38, 39, {{[0-9]+}}
507 ; CHECK-LE-LABEL: @test22
508 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 37, 37
509 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 36, 36
510 ; CHECK-LE-DAG: xvcmpeqsp {{[0-9]+}}, 36, 37
511 ; CHECK-LE-DAG: xxlnor
512 ; CHECK-LE-DAG: xxlnor
513 ; CHECK-LE-DAG: xxlor
514 ; CHECK-LE-DAG: xxlor
515 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
519 define <8 x i16> @test23(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d) {
521 %m = icmp eq <8 x i16> %c, %d
522 %v = select <8 x i1> %m, <8 x i16> %a, <8 x i16> %b
525 ; CHECK-REG-LABEL: @test23
526 ; CHECK-REG: vcmpequh {{[0-9]+}}, 4, 5
527 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
530 ; CHECK-FISL-LABEL: @test23
531 ; CHECK-FISL: vcmpequh 4, 4, 5
532 ; CHECK-FISL: vor 0, 3, 3
533 ; CHECK-FISL: vor 1, 2, 2
534 ; CHECK-FISL: vor 6, 4, 4
535 ; CHECK-FISL: xxsel 32, 32, 33, 38
536 ; CHECK-FISL: vor 2, 0,
539 ; CHECK-LE-LABEL: @test23
540 ; CHECK-LE: vcmpequh {{[0-9]+}}, 4, 5
541 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
545 define <16 x i8> @test24(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
547 %m = icmp eq <16 x i8> %c, %d
548 %v = select <16 x i1> %m, <16 x i8> %a, <16 x i8> %b
551 ; CHECK-REG-LABEL: @test24
552 ; CHECK-REG: vcmpequb {{[0-9]+}}, 4, 5
553 ; CHECK-REG: xxsel 34, 35, 34, {{[0-9]+}}
556 ; CHECK-FISL-LABEL: @test24
557 ; CHECK-FISL: vcmpequb 4, 4, 5
558 ; CHECK-FISL: vor 0, 3, 3
559 ; CHECK-FISL: vor 1, 2, 2
560 ; CHECK-FISL: vor 6, 4, 4
561 ; CHECK-FISL: xxsel 32, 32, 33, 38
562 ; CHECK-FISL: vor 2, 0, 0
565 ; CHECK-LE-LABEL: @test24
566 ; CHECK-LE: vcmpequb {{[0-9]+}}, 4, 5
567 ; CHECK-LE: xxsel 34, 35, 34, {{[0-9]+}}
571 define <2 x double> @test25(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d) {
573 %m = fcmp oeq <2 x double> %c, %d
574 %v = select <2 x i1> %m, <2 x double> %a, <2 x double> %b
577 ; CHECK-LABEL: @test25
578 ; CHECK: xvcmpeqdp [[V1:[0-9]+]], 36, 37
579 ; CHECK: xxsel 34, 35, 34, [[V1]]
582 ; CHECK-LE-LABEL: @test25
583 ; CHECK-LE: xvcmpeqdp [[V1:[0-9]+]], 36, 37
584 ; CHECK-LE: xxsel 34, 35, 34, [[V1]]
588 define <2 x i64> @test26(<2 x i64> %a, <2 x i64> %b) {
589 %v = add <2 x i64> %a, %b
592 ; CHECK-LABEL: @test26
594 ; Make sure we use only two stores (one for each operand).
599 ; FIXME: The code quality here is not good; just make sure we do something for now.
604 ; CHECK-LE: vaddudm 2, 2, 3
608 define <2 x i64> @test27(<2 x i64> %a, <2 x i64> %b) {
609 %v = and <2 x i64> %a, %b
612 ; CHECK-LABEL: @test27
613 ; CHECK: xxland 34, 34, 35
616 ; CHECK-LE-LABEL: @test27
617 ; CHECK-LE: xxland 34, 34, 35
621 define <2 x double> @test28(<2 x double>* %a) {
622 %v = load <2 x double>, <2 x double>* %a, align 16
625 ; CHECK-LABEL: @test28
626 ; CHECK: lxvd2x 34, 0, 3
629 ; CHECK-LE-LABEL: @test28
630 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
631 ; CHECK-LE: xxswapd 34, [[V1]]
635 define void @test29(<2 x double>* %a, <2 x double> %b) {
636 store <2 x double> %b, <2 x double>* %a, align 16
639 ; CHECK-LABEL: @test29
640 ; CHECK: stxvd2x 34, 0, 3
643 ; CHECK-LE-LABEL: @test29
644 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
645 ; CHECK-LE: stxvd2x [[V1]], 0, 3
649 define <2 x double> @test28u(<2 x double>* %a) {
650 %v = load <2 x double>, <2 x double>* %a, align 8
653 ; CHECK-LABEL: @test28u
654 ; CHECK: lxvd2x 34, 0, 3
657 ; CHECK-LE-LABEL: @test28u
658 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
659 ; CHECK-LE: xxswapd 34, [[V1]]
663 define void @test29u(<2 x double>* %a, <2 x double> %b) {
664 store <2 x double> %b, <2 x double>* %a, align 8
667 ; CHECK-LABEL: @test29u
668 ; CHECK: stxvd2x 34, 0, 3
671 ; CHECK-LE-LABEL: @test29u
672 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
673 ; CHECK-LE: stxvd2x [[V1]], 0, 3
677 define <2 x i64> @test30(<2 x i64>* %a) {
678 %v = load <2 x i64>, <2 x i64>* %a, align 16
681 ; CHECK-REG-LABEL: @test30
682 ; CHECK-REG: lxvd2x 34, 0, 3
685 ; CHECK-FISL-LABEL: @test30
686 ; CHECK-FISL: lxvd2x 0, 0, 3
687 ; CHECK-FISL: xxlor 34, 0, 0
688 ; CHECK-FISL: vor 3, 2, 2
689 ; CHECK-FISL: vor 2, 3, 3
692 ; CHECK-LE-LABEL: @test30
693 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
694 ; CHECK-LE: xxswapd 34, [[V1]]
698 define void @test31(<2 x i64>* %a, <2 x i64> %b) {
699 store <2 x i64> %b, <2 x i64>* %a, align 16
702 ; CHECK-LABEL: @test31
703 ; CHECK: stxvd2x 34, 0, 3
706 ; CHECK-LE-LABEL: @test31
707 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
708 ; CHECK-LE: stxvd2x [[V1]], 0, 3
712 define <4 x float> @test32(<4 x float>* %a) {
713 %v = load <4 x float>, <4 x float>* %a, align 16
716 ; CHECK-REG-LABEL: @test32
717 ; CHECK-REG: lxvw4x 34, 0, 3
720 ; CHECK-FISL-LABEL: @test32
721 ; CHECK-FISL: lxvw4x 0, 0, 3
722 ; CHECK-FISL: xxlor 34, 0, 0
725 ; CHECK-LE-LABEL: @test32
726 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
727 ; CHECK-LE: xxswapd 34, [[V1]]
731 define void @test33(<4 x float>* %a, <4 x float> %b) {
732 store <4 x float> %b, <4 x float>* %a, align 16
735 ; CHECK-REG-LABEL: @test33
736 ; CHECK-REG: stxvw4x 34, 0, 3
739 ; CHECK-FISL-LABEL: @test33
740 ; CHECK-FISL: vor 3, 2, 2
741 ; CHECK-FISL: stxvw4x 35, 0, 3
744 ; CHECK-LE-LABEL: @test33
745 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
746 ; CHECK-LE: stxvd2x [[V1]], 0, 3
750 define <4 x float> @test32u(<4 x float>* %a) {
751 %v = load <4 x float>, <4 x float>* %a, align 8
754 ; CHECK-LABEL: @test32u
761 ; CHECK-LE-LABEL: @test32u
762 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
763 ; CHECK-LE: xxswapd 34, [[V1]]
767 define void @test33u(<4 x float>* %a, <4 x float> %b) {
768 store <4 x float> %b, <4 x float>* %a, align 8
771 ; CHECK-REG-LABEL: @test33u
772 ; CHECK-REG: stxvw4x 34, 0, 3
775 ; CHECK-FISL-LABEL: @test33u
776 ; CHECK-FISL: vor 3, 2, 2
777 ; CHECK-FISL: stxvw4x 35, 0, 3
780 ; CHECK-LE-LABEL: @test33u
781 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
782 ; CHECK-LE: stxvd2x [[V1]], 0, 3
786 define <4 x i32> @test34(<4 x i32>* %a) {
787 %v = load <4 x i32>, <4 x i32>* %a, align 16
790 ; CHECK-REG-LABEL: @test34
791 ; CHECK-REG: lxvw4x 34, 0, 3
794 ; CHECK-FISL-LABEL: @test34
795 ; CHECK-FISL: lxvw4x 0, 0, 3
796 ; CHECK-FISL: xxlor 34, 0, 0
797 ; CHECK-FISL: vor 3, 2, 2
798 ; CHECK-FISL: vor 2, 3, 3
801 ; CHECK-LE-LABEL: @test34
802 ; CHECK-LE: lxvd2x [[V1:[0-9]+]], 0, 3
803 ; CHECK-LE: xxswapd 34, [[V1]]
807 define void @test35(<4 x i32>* %a, <4 x i32> %b) {
808 store <4 x i32> %b, <4 x i32>* %a, align 16
811 ; CHECK-REG-LABEL: @test35
812 ; CHECK-REG: stxvw4x 34, 0, 3
815 ; CHECK-FISL-LABEL: @test35
816 ; CHECK-FISL: vor 3, 2, 2
817 ; CHECK-FISL: stxvw4x 35, 0, 3
820 ; CHECK-LE-LABEL: @test35
821 ; CHECK-LE: xxswapd [[V1:[0-9]+]], 34
822 ; CHECK-LE: stxvd2x [[V1]], 0, 3
826 define <2 x double> @test40(<2 x i64> %a) {
827 %v = uitofp <2 x i64> %a to <2 x double>
830 ; CHECK-LABEL: @test40
831 ; CHECK: xvcvuxddp 34, 34
834 ; CHECK-LE-LABEL: @test40
835 ; CHECK-LE: xvcvuxddp 34, 34
839 define <2 x double> @test41(<2 x i64> %a) {
840 %v = sitofp <2 x i64> %a to <2 x double>
843 ; CHECK-LABEL: @test41
844 ; CHECK: xvcvsxddp 34, 34
847 ; CHECK-LE-LABEL: @test41
848 ; CHECK-LE: xvcvsxddp 34, 34
852 define <2 x i64> @test42(<2 x double> %a) {
853 %v = fptoui <2 x double> %a to <2 x i64>
856 ; CHECK-LABEL: @test42
857 ; CHECK: xvcvdpuxds 34, 34
860 ; CHECK-LE-LABEL: @test42
861 ; CHECK-LE: xvcvdpuxds 34, 34
865 define <2 x i64> @test43(<2 x double> %a) {
866 %v = fptosi <2 x double> %a to <2 x i64>
869 ; CHECK-LABEL: @test43
870 ; CHECK: xvcvdpsxds 34, 34
873 ; CHECK-LE-LABEL: @test43
874 ; CHECK-LE: xvcvdpsxds 34, 34
878 define <2 x float> @test44(<2 x i64> %a) {
879 %v = uitofp <2 x i64> %a to <2 x float>
882 ; CHECK-LABEL: @test44
883 ; FIXME: The code quality here looks pretty bad.
887 define <2 x float> @test45(<2 x i64> %a) {
888 %v = sitofp <2 x i64> %a to <2 x float>
891 ; CHECK-LABEL: @test45
892 ; FIXME: The code quality here looks pretty bad.
896 define <2 x i64> @test46(<2 x float> %a) {
897 %v = fptoui <2 x float> %a to <2 x i64>
900 ; CHECK-LABEL: @test46
901 ; FIXME: The code quality here looks pretty bad.
905 define <2 x i64> @test47(<2 x float> %a) {
906 %v = fptosi <2 x float> %a to <2 x i64>
909 ; CHECK-LABEL: @test47
910 ; FIXME: The code quality here looks pretty bad.
914 define <2 x double> @test50(double* %a) {
915 %v = load double, double* %a, align 8
916 %w = insertelement <2 x double> undef, double %v, i32 0
917 %x = insertelement <2 x double> %w, double %v, i32 1
920 ; CHECK-LABEL: @test50
921 ; CHECK: lxvdsx 34, 0, 3
924 ; CHECK-LE-LABEL: @test50
925 ; CHECK-LE: lxvdsx 34, 0, 3
929 define <2 x double> @test51(<2 x double> %a, <2 x double> %b) {
930 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
933 ; CHECK-LABEL: @test51
934 ; CHECK: xxspltd 34, 34, 0
937 ; CHECK-LE-LABEL: @test51
938 ; CHECK-LE: xxspltd 34, 34, 1
942 define <2 x double> @test52(<2 x double> %a, <2 x double> %b) {
943 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
946 ; CHECK-LABEL: @test52
947 ; CHECK: xxmrghd 34, 34, 35
950 ; CHECK-LE-LABEL: @test52
951 ; CHECK-LE: xxmrgld 34, 35, 34
955 define <2 x double> @test53(<2 x double> %a, <2 x double> %b) {
956 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 0>
959 ; CHECK-LABEL: @test53
960 ; CHECK: xxmrghd 34, 35, 34
963 ; CHECK-LE-LABEL: @test53
964 ; CHECK-LE: xxmrgld 34, 34, 35
968 define <2 x double> @test54(<2 x double> %a, <2 x double> %b) {
969 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2>
972 ; CHECK-LABEL: @test54
973 ; CHECK: xxpermdi 34, 34, 35, 2
976 ; CHECK-LE-LABEL: @test54
977 ; CHECK-LE: xxpermdi 34, 35, 34, 2
981 define <2 x double> @test55(<2 x double> %a, <2 x double> %b) {
982 %v = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
985 ; CHECK-LABEL: @test55
986 ; CHECK: xxmrgld 34, 34, 35
989 ; CHECK-LE-LABEL: @test55
990 ; CHECK-LE: xxmrghd 34, 35, 34
994 define <2 x i64> @test56(<2 x i64> %a, <2 x i64> %b) {
995 %v = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
998 ; CHECK-LABEL: @test56
999 ; CHECK: xxmrgld 34, 34, 35
1002 ; CHECK-LE-LABEL: @test56
1003 ; CHECK-LE: xxmrghd 34, 35, 34
1007 define <2 x i64> @test60(<2 x i64> %a, <2 x i64> %b) {
1008 %v = shl <2 x i64> %a, %b
1011 ; CHECK-LABEL: @test60
1012 ; This should scalarize, and the current code quality is not good.
1021 define <2 x i64> @test61(<2 x i64> %a, <2 x i64> %b) {
1022 %v = lshr <2 x i64> %a, %b
1025 ; CHECK-LABEL: @test61
1026 ; This should scalarize, and the current code quality is not good.
1035 define <2 x i64> @test62(<2 x i64> %a, <2 x i64> %b) {
1036 %v = ashr <2 x i64> %a, %b
1039 ; CHECK-LABEL: @test62
1040 ; This should scalarize, and the current code quality is not good.
1049 define double @test63(<2 x double> %a) {
1050 %v = extractelement <2 x double> %a, i32 0
1053 ; CHECK-REG-LABEL: @test63
1054 ; CHECK-REG: xxlor 1, 34, 34
1057 ; CHECK-FISL-LABEL: @test63
1058 ; CHECK-FISL: xxlor 0, 34, 34
1059 ; CHECK-FISL: fmr 1, 0
1062 ; CHECK-LE-LABEL: @test63
1063 ; CHECK-LE: xxswapd 1, 34
1067 define double @test64(<2 x double> %a) {
1068 %v = extractelement <2 x double> %a, i32 1
1071 ; CHECK-REG-LABEL: @test64
1072 ; CHECK-REG: xxswapd 1, 34
1075 ; CHECK-FISL-LABEL: @test64
1076 ; CHECK-FISL: xxswapd 34, 34
1077 ; CHECK-FISL: xxlor 0, 34, 34
1078 ; CHECK-FISL: fmr 1, 0
1081 ; CHECK-LE-LABEL: @test64
1082 ; CHECK-LE: xxlor 1, 34, 34
1085 define <2 x i1> @test65(<2 x i64> %a, <2 x i64> %b) {
1086 %w = icmp eq <2 x i64> %a, %b
1089 ; CHECK-REG-LABEL: @test65
1090 ; CHECK-REG: vcmpequw 2, 2, 3
1093 ; CHECK-FISL-LABEL: @test65
1094 ; CHECK-FISL: vor 4, 3, 3
1095 ; CHECK-FISL: vor 5, 2, 2
1096 ; CHECK-FISL: vcmpequw 4, 5, 4
1097 ; CHECK-FISL: vor 2, 4, 4
1100 ; CHECK-LE-LABEL: @test65
1101 ; CHECK-LE: vcmpequd 2, 2, 3
1105 define <2 x i1> @test66(<2 x i64> %a, <2 x i64> %b) {
1106 %w = icmp ne <2 x i64> %a, %b
1109 ; CHECK-REG-LABEL: @test66
1110 ; CHECK-REG: vcmpequw {{[0-9]+}}, 2, 3
1111 ; CHECK-REG: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1114 ; CHECK-FISL-LABEL: @test66
1115 ; CHECK-FISL: vcmpequw {{[0-9]+}}, 5, 4
1116 ; CHECK-FISL: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1119 ; CHECK-LE-LABEL: @test66
1120 ; CHECK-LE: vcmpequd {{[0-9]+}}, 2, 3
1121 ; CHECK-LE: xxlnor 34, {{[0-9]+}}, {{[0-9]+}}
1125 define <2 x i1> @test67(<2 x i64> %a, <2 x i64> %b) {
1126 %w = icmp ult <2 x i64> %a, %b
1129 ; CHECK-LABEL: @test67
1130 ; This should scalarize, and the current code quality is not good.
1138 ; CHECK-LE-LABEL: @test67
1139 ; CHECK-LE: vcmpgtud 2, 3, 2
1143 define <2 x double> @test68(<2 x i32> %a) {
1144 %w = sitofp <2 x i32> %a to <2 x double>
1147 ; CHECK-LABEL: @test68
1148 ; CHECK: xxsldwi [[V1:[0-9]+]], 34, 34, 1
1149 ; CHECK: xvcvsxwdp 34, [[V1]]
1152 ; CHECK-LE-LABEL: @test68
1153 ; CHECK-LE: xxsldwi [[V1:[0-9]+]], 34, 34, 1
1154 ; CHECK-LE: xvcvsxwdp 34, [[V1]]
1158 define <2 x double> @test69(<2 x i16> %a) {
1159 %w = sitofp <2 x i16> %a to <2 x double>
1162 ; CHECK-LABEL: @test69
1163 ; CHECK: vspltisw [[V1:[0-9]+]], 8
1164 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1165 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1166 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1167 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1168 ; CHECK: xvcvsxwdp 34, [[V4]]
1171 ; CHECK-LE-LABEL: @test69
1172 ; CHECK-LE: vspltisw [[V1:[0-9]+]], 8
1173 ; CHECK-LE: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1174 ; CHECK-LE: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1175 ; CHECK-LE: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1176 ; CHECK-LE: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1177 ; CHECK-LE: xvcvsxwdp 34, [[V4]]
1181 define <2 x double> @test70(<2 x i8> %a) {
1182 %w = sitofp <2 x i8> %a to <2 x double>
1185 ; CHECK-LABEL: @test70
1186 ; CHECK: vspltisw [[V1:[0-9]+]], 12
1187 ; CHECK: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1188 ; CHECK: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1189 ; CHECK: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1190 ; CHECK: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1191 ; CHECK: xvcvsxwdp 34, [[V4]]
1194 ; CHECK-LE-LABEL: @test70
1195 ; CHECK-LE: vspltisw [[V1:[0-9]+]], 12
1196 ; CHECK-LE: vadduwm [[V2:[0-9]+]], [[V1]], [[V1]]
1197 ; CHECK-LE: vslw [[V3:[0-9]+]], {{[0-9]+}}, [[V2]]
1198 ; CHECK-LE: vsraw {{[0-9]+}}, [[V3]], [[V2]]
1199 ; CHECK-LE: xxsldwi [[V4:[0-9]+]], {{[0-9]+}}, {{[0-9]+}}, 1
1200 ; CHECK-LE: xvcvsxwdp 34, [[V4]]
1204 define <2 x i32> @test80(i32 %v) {
1205 %b1 = insertelement <2 x i32> undef, i32 %v, i32 0
1206 %b2 = shufflevector <2 x i32> %b1, <2 x i32> undef, <2 x i32> zeroinitializer
1207 %i = add <2 x i32> %b2, <i32 2, i32 3>
1210 ; CHECK-REG-LABEL: @test80
1211 ; CHECK-REG-DAG: addi [[R1:[0-9]+]], 3, 3
1212 ; CHECK-REG-DAG: addi [[R2:[0-9]+]], 1, -16
1213 ; CHECK-REG-DAG: addi [[R3:[0-9]+]], 3, 2
1214 ; CHECK-REG: std [[R1]], -8(1)
1215 ; CHECK-REG: std [[R3]], -16(1)
1216 ; CHECK-REG: lxvd2x 34, 0, [[R2]]
1217 ; CHECK-REG-NOT: stxvd2x
1220 ; CHECK-FISL-LABEL: @test80
1221 ; CHECK-FISL-DAG: addi [[R1:[0-9]+]], 3, 3
1222 ; CHECK-FISL-DAG: addi [[R2:[0-9]+]], 1, -16
1223 ; CHECK-FISL-DAG: addi [[R3:[0-9]+]], 3, 2
1224 ; CHECK-FISL-DAG: std [[R1]], -8(1)
1225 ; CHECK-FISL-DAG: std [[R3]], -16(1)
1226 ; CHECK-FISL-DAG: lxvd2x 0, 0, [[R2]]
1229 ; CHECK-LE-LABEL: @test80
1230 ; CHECK-LE-DAG: addi [[R1:[0-9]+]], 1, -16
1231 ; CHECK-LE-DAG: addi [[R2:[0-9]+]], {{[0-9]+}}, .LCPI
1232 ; CHECK-LE-DAG: lxvd2x [[V1:[0-9]+]], 0, [[R1]]
1233 ; CHECK-LE-DAG: lxvd2x [[V2:[0-9]+]], 0, [[R2]]
1234 ; CHECK-LE-DAG: xxswapd 34, [[V1]]
1235 ; CHECK-LE-DAG: xxswapd 35, [[V2]]
1236 ; CHECK-LE: vaddudm 2, 2, 3
1240 define <2 x double> @test81(<4 x float> %b) {
1241 %w = bitcast <4 x float> %b to <2 x double>
1244 ; CHECK-LABEL: @test81
1247 ; CHECK-LE-LABEL: @test81
1251 define double @test82(double %a, double %b, double %c, double %d) {
1253 %m = fcmp oeq double %c, %d
1254 %v = select i1 %m, double %a, double %b
1257 ; CHECK-REG-LABEL: @test82
1258 ; CHECK-REG: xscmpudp [[REG:[0-9]+]], 3, 4
1259 ; CHECK-REG: beqlr [[REG]]
1261 ; CHECK-FISL-LABEL: @test82
1262 ; CHECK-FISL: xscmpudp [[REG:[0-9]+]], 3, 4
1263 ; CHECK-FISL: beq [[REG]], {{.*}}
1265 ; CHECK-LE-LABEL: @test82
1266 ; CHECK-LE: xscmpudp [[REG:[0-9]+]], 3, 4
1267 ; CHECK-LE: beqlr [[REG]]