1 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mattr=+altivec | FileCheck %s
3 define void @VPKUHUM_xy(<16 x i8>* %A, <16 x i8>* %B) {
6 %tmp = load <16 x i8>* %A
7 %tmp2 = load <16 x i8>* %B
8 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
10 store <16 x i8> %tmp3, <16 x i8>* %A
14 define void @VPKUHUM_xx(<16 x i8>* %A) {
17 %tmp = load <16 x i8>* %A
18 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
20 store <16 x i8> %tmp2, <16 x i8>* %A
24 define void @VPKUWUM_xy(<16 x i8>* %A, <16 x i8>* %B) {
27 %tmp = load <16 x i8>* %A
28 %tmp2 = load <16 x i8>* %B
29 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29>
31 store <16 x i8> %tmp3, <16 x i8>* %A
35 define void @VPKUWUM_xx(<16 x i8>* %A) {
38 %tmp = load <16 x i8>* %A
39 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13>
41 store <16 x i8> %tmp2, <16 x i8>* %A
45 define void @VMRGLB_xy(<16 x i8>* %A, <16 x i8>* %B) {
48 %tmp = load <16 x i8>* %A
49 %tmp2 = load <16 x i8>* %B
50 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
52 store <16 x i8> %tmp3, <16 x i8>* %A
56 define void @VMRGLB_xx(<16 x i8>* %A) {
59 %tmp = load <16 x i8>* %A
60 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7>
62 store <16 x i8> %tmp2, <16 x i8>* %A
66 define void @VMRGHB_xy(<16 x i8>* %A, <16 x i8>* %B) {
69 %tmp = load <16 x i8>* %A
70 %tmp2 = load <16 x i8>* %B
71 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
73 store <16 x i8> %tmp3, <16 x i8>* %A
77 define void @VMRGHB_xx(<16 x i8>* %A) {
80 %tmp = load <16 x i8>* %A
81 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 8, i32 9, i32 9, i32 10, i32 10, i32 11, i32 11, i32 12, i32 12, i32 13, i32 13, i32 14, i32 14, i32 15, i32 15>
83 store <16 x i8> %tmp2, <16 x i8>* %A
87 define void @VMRGLH_xy(<16 x i8>* %A, <16 x i8>* %B) {
90 %tmp = load <16 x i8>* %A
91 %tmp2 = load <16 x i8>* %B
92 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 4, i32 5, i32 20, i32 21, i32 6, i32 7, i32 22, i32 23>
94 store <16 x i8> %tmp3, <16 x i8>* %A
98 define void @VMRGLH_xx(<16 x i8>* %A) {
101 %tmp = load <16 x i8>* %A
102 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 4, i32 5, i32 4, i32 5, i32 6, i32 7, i32 6, i32 7>
104 store <16 x i8> %tmp2, <16 x i8>* %A
108 define void @VMRGHH_xy(<16 x i8>* %A, <16 x i8>* %B) {
111 %tmp = load <16 x i8>* %A
112 %tmp2 = load <16 x i8>* %B
113 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 9, i32 24, i32 25, i32 10, i32 11, i32 26, i32 27, i32 12, i32 13, i32 28, i32 29, i32 14, i32 15, i32 30, i32 31>
115 store <16 x i8> %tmp3, <16 x i8>* %A
119 define void @VMRGHH_xx(<16 x i8>* %A) {
122 %tmp = load <16 x i8>* %A
123 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 9, i32 8, i32 9, i32 10, i32 11, i32 10, i32 11, i32 12, i32 13, i32 12, i32 13, i32 14, i32 15, i32 14, i32 15>
125 store <16 x i8> %tmp2, <16 x i8>* %A
129 define void @VMRGLW_xy(<16 x i8>* %A, <16 x i8>* %B) {
132 %tmp = load <16 x i8>* %A
133 %tmp2 = load <16 x i8>* %B
134 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23>
136 store <16 x i8> %tmp3, <16 x i8>* %A
140 define void @VMRGLW_xx(<16 x i8>* %A) {
143 %tmp = load <16 x i8>* %A
144 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
146 store <16 x i8> %tmp2, <16 x i8>* %A
150 define void @VMRGHW_xy(<16 x i8>* %A, <16 x i8>* %B) {
153 %tmp = load <16 x i8>* %A
154 %tmp2 = load <16 x i8>* %B
155 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31>
157 store <16 x i8> %tmp3, <16 x i8>* %A
161 define void @VMRGHW_xx(<16 x i8>* %A) {
164 %tmp = load <16 x i8>* %A
165 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
167 store <16 x i8> %tmp2, <16 x i8>* %A
171 define void @VSLDOI_xy(<16 x i8>* %A, <16 x i8>* %B) {
174 %tmp = load <16 x i8>* %A
175 %tmp2 = load <16 x i8>* %B
176 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, <16 x i32> <i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4>
178 store <16 x i8> %tmp3, <16 x i8>* %A
182 define void @VSLDOI_xx(<16 x i8>* %A) {
185 %tmp = load <16 x i8>* %A
186 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4>
188 store <16 x i8> %tmp2, <16 x i8>* %A