1 ; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
2 ; Hexagon Programmer's Reference Manual 11.10.7 XTYPE/PRED
5 declare i32 @llvm.hexagon.A4.cmpbgt(i32, i32)
6 define i32 @A4_cmpbgt(i32 %a, i32 %b) {
7 %z = call i32 @llvm.hexagon.A4.cmpbgt(i32 %a, i32 %b)
10 ; CHECK: p0 = cmpb.gt(r0, r1)
12 declare i32 @llvm.hexagon.A4.cmpbeq(i32, i32)
13 define i32 @A4_cmpbeq(i32 %a, i32 %b) {
14 %z = call i32 @llvm.hexagon.A4.cmpbeq(i32 %a, i32 %b)
17 ; CHECK: p0 = cmpb.eq(r0, r1)
19 declare i32 @llvm.hexagon.A4.cmpbgtu(i32, i32)
20 define i32 @A4_cmpbgtu(i32 %a, i32 %b) {
21 %z = call i32 @llvm.hexagon.A4.cmpbgtu(i32 %a, i32 %b)
24 ; CHECK: p0 = cmpb.gtu(r0, r1)
26 declare i32 @llvm.hexagon.A4.cmpbgti(i32, i32)
27 define i32 @A4_cmpbgti(i32 %a) {
28 %z = call i32 @llvm.hexagon.A4.cmpbgti(i32 %a, i32 0)
31 ; CHECK: p0 = cmpb.gt(r0, #0)
33 declare i32 @llvm.hexagon.A4.cmpbeqi(i32, i32)
34 define i32 @A4_cmpbeqi(i32 %a) {
35 %z = call i32 @llvm.hexagon.A4.cmpbeqi(i32 %a, i32 0)
38 ; CHECK: p0 = cmpb.eq(r0, #0)
40 declare i32 @llvm.hexagon.A4.cmpbgtui(i32, i32)
41 define i32 @A4_cmpbgtui(i32 %a) {
42 %z = call i32 @llvm.hexagon.A4.cmpbgtui(i32 %a, i32 0)
45 ; CHECK: p0 = cmpb.gtu(r0, #0)
48 declare i32 @llvm.hexagon.A4.cmphgt(i32, i32)
49 define i32 @A4_cmphgt(i32 %a, i32 %b) {
50 %z = call i32 @llvm.hexagon.A4.cmphgt(i32 %a, i32 %b)
53 ; CHECK: p0 = cmph.gt(r0, r1)
55 declare i32 @llvm.hexagon.A4.cmpheq(i32, i32)
56 define i32 @A4_cmpheq(i32 %a, i32 %b) {
57 %z = call i32 @llvm.hexagon.A4.cmpheq(i32 %a, i32 %b)
60 ; CHECK: p0 = cmph.eq(r0, r1)
62 declare i32 @llvm.hexagon.A4.cmphgtu(i32, i32)
63 define i32 @A4_cmphgtu(i32 %a, i32 %b) {
64 %z = call i32 @llvm.hexagon.A4.cmphgtu(i32 %a, i32 %b)
67 ; CHECK: p0 = cmph.gtu(r0, r1)
69 declare i32 @llvm.hexagon.A4.cmphgti(i32, i32)
70 define i32 @A4_cmphgti(i32 %a) {
71 %z = call i32 @llvm.hexagon.A4.cmphgti(i32 %a, i32 0)
74 ; CHECK: p0 = cmph.gt(r0, #0)
76 declare i32 @llvm.hexagon.A4.cmpheqi(i32, i32)
77 define i32 @A4_cmpheqi(i32 %a) {
78 %z = call i32 @llvm.hexagon.A4.cmpheqi(i32 %a, i32 0)
81 ; CHECK: p0 = cmph.eq(r0, #0)
83 declare i32 @llvm.hexagon.A4.cmphgtui(i32, i32)
84 define i32 @A4_cmphgtui(i32 %a) {
85 %z = call i32 @llvm.hexagon.A4.cmphgtui(i32 %a, i32 0)
88 ; CHECK: p0 = cmph.gtu(r0, #0)
91 declare i32 @llvm.hexagon.C2.cmpgtp(i64, i64)
92 define i32 @C2_cmpgtp(i64 %a, i64 %b) {
93 %z = call i32 @llvm.hexagon.C2.cmpgtp(i64 %a, i64 %b)
96 ; CHECK: p0 = cmp.gt(r1:0, r3:2)
98 declare i32 @llvm.hexagon.C2.cmpeqp(i64, i64)
99 define i32 @C2_cmpeqp(i64 %a, i64 %b) {
100 %z = call i32 @llvm.hexagon.C2.cmpeqp(i64 %a, i64 %b)
103 ; CHECK: p0 = cmp.eq(r1:0, r3:2)
105 declare i32 @llvm.hexagon.C2.cmpgtup(i64, i64)
106 define i32 @C2_cmpgtup(i64 %a, i64 %b) {
107 %z = call i32 @llvm.hexagon.C2.cmpgtup(i64 %a, i64 %b)
110 ; CHECK: p0 = cmp.gtu(r1:0, r3:2)
113 declare i32 @llvm.hexagon.C2.bitsclri(i32, i32)
114 define i32 @C2_bitsclri(i32 %a) {
115 %z = call i32 @llvm.hexagon.C2.bitsclri(i32 %a, i32 0)
118 ; CHECK: p0 = bitsclr(r0, #0)
120 declare i32 @llvm.hexagon.C4.nbitsclri(i32, i32)
121 define i32 @C4_nbitsclri(i32 %a) {
122 %z = call i32 @llvm.hexagon.C4.nbitsclri(i32 %a, i32 0)
125 ; CHECK: p0 = !bitsclr(r0, #0)
127 declare i32 @llvm.hexagon.C2.bitsset(i32, i32)
128 define i32 @C2_bitsset(i32 %a, i32 %b) {
129 %z = call i32 @llvm.hexagon.C2.bitsset(i32 %a, i32 %b)
132 ; CHECK: p0 = bitsset(r0, r1)
134 declare i32 @llvm.hexagon.C4.nbitsset(i32, i32)
135 define i32 @C4_nbitsset(i32 %a, i32 %b) {
136 %z = call i32 @llvm.hexagon.C4.nbitsset(i32 %a, i32 %b)
139 ; CHECK: p0 = !bitsset(r0, r1)
141 declare i32 @llvm.hexagon.C2.bitsclr(i32, i32)
142 define i32 @C2_bitsclr(i32 %a, i32 %b) {
143 %z = call i32 @llvm.hexagon.C2.bitsclr(i32 %a, i32 %b)
146 ; CHECK: p0 = bitsclr(r0, r1)
148 declare i32 @llvm.hexagon.C4.nbitsclr(i32, i32)
149 define i32 @C4_nbitsclr(i32 %a, i32 %b) {
150 %z = call i32 @llvm.hexagon.C4.nbitsclr(i32 %a, i32 %b)
153 ; CHECK: p0 = !bitsclr(r0, r1)
155 ; Mask generate from predicate
156 declare i64 @llvm.hexagon.C2.mask(i32)
157 define i64 @C2_mask(i32 %a) {
158 %z = call i64 @llvm.hexagon.C2.mask(i32 %a)
163 ; Check for TLB match
164 declare i32 @llvm.hexagon.A4.tlbmatch(i64, i32)
165 define i32 @A4_tlbmatch(i64 %a, i32 %b) {
166 %z = call i32 @llvm.hexagon.A4.tlbmatch(i64 %a, i32 %b)
169 ; CHECK: p0 = tlbmatch(r1:0, r2)
172 declare i32 @llvm.hexagon.S2.tstbit.i(i32, i32)
173 define i32 @S2_tstbit_i(i32 %a) {
174 %z = call i32 @llvm.hexagon.S2.tstbit.i(i32 %a, i32 0)
177 ; CHECK: p0 = tstbit(r0, #0)
179 declare i32 @llvm.hexagon.S4.ntstbit.i(i32, i32)
180 define i32 @S4_ntstbit_i(i32 %a) {
181 %z = call i32 @llvm.hexagon.S4.ntstbit.i(i32 %a, i32 0)
184 ; CHECK: p0 = !tstbit(r0, #0)
186 declare i32 @llvm.hexagon.S2.tstbit.r(i32, i32)
187 define i32 @S2_tstbit_r(i32 %a, i32 %b) {
188 %z = call i32 @llvm.hexagon.S2.tstbit.r(i32 %a, i32 %b)
191 ; CHECK: p0 = tstbit(r0, r1)
193 declare i32 @llvm.hexagon.S4.ntstbit.r(i32, i32)
194 define i32 @S4_ntstbit_r(i32 %a, i32 %b) {
195 %z = call i32 @llvm.hexagon.S4.ntstbit.r(i32 %a, i32 %b)
198 ; CHECK: p0 = !tstbit(r0, r1)
200 ; Vector compare halfwords
201 declare i32 @llvm.hexagon.A2.vcmpheq(i64, i64)
202 define i32 @A2_vcmpheq(i64 %a, i64 %b) {
203 %z = call i32 @llvm.hexagon.A2.vcmpheq(i64 %a, i64 %b)
206 ; CHECK: p0 = vcmph.eq(r1:0, r3:2)
208 declare i32 @llvm.hexagon.A2.vcmphgt(i64, i64)
209 define i32 @A2_vcmphgt(i64 %a, i64 %b) {
210 %z = call i32 @llvm.hexagon.A2.vcmphgt(i64 %a, i64 %b)
213 ; CHECK: p0 = vcmph.gt(r1:0, r3:2)
215 declare i32 @llvm.hexagon.A2.vcmphgtu(i64, i64)
216 define i32 @A2_vcmphgtu(i64 %a, i64 %b) {
217 %z = call i32 @llvm.hexagon.A2.vcmphgtu(i64 %a, i64 %b)
220 ; CHECK: p0 = vcmph.gtu(r1:0, r3:2)
222 declare i32 @llvm.hexagon.A4.vcmpheqi(i64, i32)
223 define i32 @A4_vcmpheqi(i64 %a) {
224 %z = call i32 @llvm.hexagon.A4.vcmpheqi(i64 %a, i32 0)
227 ; CHECK: p0 = vcmph.eq(r1:0, #0)
229 declare i32 @llvm.hexagon.A4.vcmphgti(i64, i32)
230 define i32 @A4_vcmphgti(i64 %a) {
231 %z = call i32 @llvm.hexagon.A4.vcmphgti(i64 %a, i32 0)
234 ; CHECK: p0 = vcmph.gt(r1:0, #0)
236 declare i32 @llvm.hexagon.A4.vcmphgtui(i64, i32)
237 define i32 @A4_vcmphgtui(i64 %a) {
238 %z = call i32 @llvm.hexagon.A4.vcmphgtui(i64 %a, i32 0)
241 ; CHECK: p0 = vcmph.gtu(r1:0, #0)
243 ; Vector compare bytes for any match
244 declare i32 @llvm.hexagon.A4.vcmpbeq.any(i64, i64)
245 define i32 @A4_vcmpbeq_any(i64 %a, i64 %b) {
246 %z = call i32 @llvm.hexagon.A4.vcmpbeq.any(i64 %a, i64 %b)
249 ; CHECK: p0 = any8(vcmpb.eq(r1:0, r3:2))
251 ; Vector compare bytes
252 declare i32 @llvm.hexagon.A2.vcmpbeq(i64, i64)
253 define i32 @A2_vcmpbeq(i64 %a, i64 %b) {
254 %z = call i32 @llvm.hexagon.A2.vcmpbeq(i64 %a, i64 %b)
257 ; CHECK: p0 = vcmpb.eq(r1:0, r3:2)
259 declare i32 @llvm.hexagon.A2.vcmpbgtu(i64, i64)
260 define i32 @A2_vcmpbgtu(i64 %a, i64 %b) {
261 %z = call i32 @llvm.hexagon.A2.vcmpbgtu(i64 %a, i64 %b)
264 ; CHECK: p0 = vcmpb.gtu(r1:0, r3:2)
266 declare i32 @llvm.hexagon.A4.vcmpbgt(i64, i64)
267 define i32 @A4_vcmpbgt(i64 %a, i64 %b) {
268 %z = call i32 @llvm.hexagon.A4.vcmpbgt(i64 %a, i64 %b)
271 ; CHECK: p0 = vcmpb.gt(r1:0, r3:2)
273 declare i32 @llvm.hexagon.A4.vcmpbeqi(i64, i32)
274 define i32 @A4_vcmpbeqi(i64 %a) {
275 %z = call i32 @llvm.hexagon.A4.vcmpbeqi(i64 %a, i32 0)
278 ; CHECK: p0 = vcmpb.eq(r1:0, #0)
280 declare i32 @llvm.hexagon.A4.vcmpbgti(i64, i32)
281 define i32 @A4_vcmpbgti(i64 %a) {
282 %z = call i32 @llvm.hexagon.A4.vcmpbgti(i64 %a, i32 0)
285 ; CHECK: p0 = vcmpb.gt(r1:0, #0)
287 declare i32 @llvm.hexagon.A4.vcmpbgtui(i64, i32)
288 define i32 @A4_vcmpbgtui(i64 %a) {
289 %z = call i32 @llvm.hexagon.A4.vcmpbgtui(i64 %a, i32 0)
292 ; CHECK: p0 = vcmpb.gtu(r1:0, #0)
294 ; Vector compare words
295 declare i32 @llvm.hexagon.A2.vcmpweq(i64, i64)
296 define i32 @A2_vcmpweq(i64 %a, i64 %b) {
297 %z = call i32 @llvm.hexagon.A2.vcmpweq(i64 %a, i64 %b)
300 ; CHECK: p0 = vcmpw.eq(r1:0, r3:2)
302 declare i32 @llvm.hexagon.A2.vcmpwgt(i64, i64)
303 define i32 @A2_vcmpwgt(i64 %a, i64 %b) {
304 %z = call i32 @llvm.hexagon.A2.vcmpwgt(i64 %a, i64 %b)
307 ; CHECK: p0 = vcmpw.gt(r1:0, r3:2)
309 declare i32 @llvm.hexagon.A2.vcmpwgtu(i64, i64)
310 define i32 @A2_vcmpwgtu(i64 %a, i64 %b) {
311 %z = call i32 @llvm.hexagon.A2.vcmpwgtu(i64 %a, i64 %b)
314 ; CHECK: p0 = vcmpw.gtu(r1:0, r3:2)
316 declare i32 @llvm.hexagon.A4.vcmpweqi(i64, i32)
317 define i32 @A4_vcmpweqi(i64 %a) {
318 %z = call i32 @llvm.hexagon.A4.vcmpweqi(i64 %a, i32 0)
321 ; CHECK: p0 = vcmpw.eq(r1:0, #0)
323 declare i32 @llvm.hexagon.A4.vcmpwgti(i64, i32)
324 define i32 @A4_vcmpwgti(i64 %a) {
325 %z = call i32 @llvm.hexagon.A4.vcmpwgti(i64 %a, i32 0)
328 ; CHECK: p0 = vcmpw.gt(r1:0, #0)
330 declare i32 @llvm.hexagon.A4.vcmpwgtui(i64, i32)
331 define i32 @A4_vcmpwgtui(i64 %a) {
332 %z = call i32 @llvm.hexagon.A4.vcmpwgtui(i64 %a, i32 0)
335 ; CHECK: p0 = vcmpw.gtu(r1:0, #0)
337 ; Viterbi pack even and odd predicate bitsclr
338 declare i32 @llvm.hexagon.C2.vitpack(i32, i32)
339 define i32 @C2_vitpack(i32 %a, i32 %b) {
340 %z = call i32 @llvm.hexagon.C2.vitpack(i32 %a, i32 %b)
343 ; CHECK: r0 = vitpack(p1, p0)
346 declare i64 @llvm.hexagon.C2.vmux(i32, i64, i64)
347 define i64 @C2_vmux(i32 %a, i64 %b, i64 %c) {
348 %z = call i64 @llvm.hexagon.C2.vmux(i32 %a, i64 %b, i64 %c)
351 ; CHECK: = vmux(p0, r3:2, r5:4)