1 ; Use the -disable-cfi flag so that we get the compact unwind info in the
2 ; emitted assembly. Compact unwind info is omitted when CFI directives
5 ; RUN: llc -march=arm64 -mtriple=arm64-apple-ios -disable-cfi < %s | FileCheck %s
9 @bar = common global i32 0, align 4
11 ; Leaf function with no stack allocation and no saving/restoring
12 ; of non-volatile registers.
13 define i32 @foo1(i32 %a) #0 {
15 %add = add nsw i32 %a, 42
19 ; Leaf function with stack allocation but no saving/restoring
20 ; of non-volatile registers.
21 define i32 @foo2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
23 %stack = alloca [36 x i32], align 4
26 for.body: ; preds = %for.body, %entry
27 %indvars.iv19 = phi i64 [ 0, %entry ], [ %indvars.iv.next20, %for.body ]
28 %arrayidx = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv19
29 %0 = trunc i64 %indvars.iv19 to i32
30 store i32 %0, i32* %arrayidx, align 4, !tbaa !0
31 %indvars.iv.next20 = add i64 %indvars.iv19, 1
32 %lftr.wideiv21 = trunc i64 %indvars.iv.next20 to i32
33 %exitcond22 = icmp eq i32 %lftr.wideiv21, 36
34 br i1 %exitcond22, label %for.body4, label %for.body
36 for.body4: ; preds = %for.body, %for.body4
37 %indvars.iv = phi i64 [ %indvars.iv.next, %for.body4 ], [ 0, %for.body ]
38 %z1.016 = phi i32 [ %add, %for.body4 ], [ 0, %for.body ]
39 %arrayidx6 = getelementptr inbounds [36 x i32]* %stack, i64 0, i64 %indvars.iv
40 %1 = load i32* %arrayidx6, align 4, !tbaa !0
41 %add = add nsw i32 %1, %z1.016
42 %indvars.iv.next = add i64 %indvars.iv, 1
43 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
44 %exitcond = icmp eq i32 %lftr.wideiv, 36
45 br i1 %exitcond, label %for.end9, label %for.body4
47 for.end9: ; preds = %for.body4
51 ; Leaf function with no stack allocation but with saving restoring of
52 ; non-volatile registers.
53 define i32 @foo3(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #1 {
55 %0 = load volatile i32* @bar, align 4, !tbaa !0
56 %1 = load volatile i32* @bar, align 4, !tbaa !0
57 %2 = load volatile i32* @bar, align 4, !tbaa !0
58 %3 = load volatile i32* @bar, align 4, !tbaa !0
59 %4 = load volatile i32* @bar, align 4, !tbaa !0
60 %5 = load volatile i32* @bar, align 4, !tbaa !0
61 %6 = load volatile i32* @bar, align 4, !tbaa !0
62 %7 = load volatile i32* @bar, align 4, !tbaa !0
63 %8 = load volatile i32* @bar, align 4, !tbaa !0
64 %9 = load volatile i32* @bar, align 4, !tbaa !0
65 %10 = load volatile i32* @bar, align 4, !tbaa !0
66 %11 = load volatile i32* @bar, align 4, !tbaa !0
67 %12 = load volatile i32* @bar, align 4, !tbaa !0
68 %13 = load volatile i32* @bar, align 4, !tbaa !0
69 %14 = load volatile i32* @bar, align 4, !tbaa !0
70 %15 = load volatile i32* @bar, align 4, !tbaa !0
71 %16 = load volatile i32* @bar, align 4, !tbaa !0
72 %17 = load volatile i32* @bar, align 4, !tbaa !0
73 %factor = mul i32 %h, -2
74 %factor56 = mul i32 %g, -2
75 %factor57 = mul i32 %f, -2
76 %factor58 = mul i32 %e, -2
77 %factor59 = mul i32 %d, -2
78 %factor60 = mul i32 %c, -2
79 %factor61 = mul i32 %b, -2
81 %sum62 = add i32 %sum, %2
82 %sum63 = add i32 %sum62, %3
83 %sum64 = add i32 %sum63, %4
84 %sum65 = add i32 %sum64, %5
85 %sum66 = add i32 %sum65, %6
86 %sum67 = add i32 %sum66, %7
87 %sum68 = add i32 %sum67, %8
88 %sum69 = add i32 %sum68, %9
89 %sum70 = add i32 %sum69, %10
90 %sum71 = add i32 %sum70, %11
91 %sum72 = add i32 %sum71, %12
92 %sum73 = add i32 %sum72, %13
93 %sum74 = add i32 %sum73, %14
94 %sum75 = add i32 %sum74, %15
95 %sum76 = add i32 %sum75, %16
96 %sub10 = sub i32 %17, %sum76
97 %sub11 = add i32 %sub10, %factor
98 %sub12 = add i32 %sub11, %factor56
99 %sub13 = add i32 %sub12, %factor57
100 %sub14 = add i32 %sub13, %factor58
101 %sub15 = add i32 %sub14, %factor59
102 %sub16 = add i32 %sub15, %factor60
103 %add = add i32 %sub16, %factor61
107 ; Leaf function with stack allocation and saving/restoring of non-volatile
109 define i32 @foo4(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) #0 {
111 %stack = alloca [128 x i32], align 4
112 %0 = zext i32 %a to i64
115 for.cond2.preheader: ; preds = %for.body
116 %1 = sext i32 %f to i64
119 for.body: ; preds = %for.body, %entry
120 %indvars.iv22 = phi i64 [ 0, %entry ], [ %indvars.iv.next23, %for.body ]
121 %2 = add nsw i64 %indvars.iv22, %0
122 %arrayidx = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %indvars.iv22
123 %3 = trunc i64 %2 to i32
124 store i32 %3, i32* %arrayidx, align 4, !tbaa !0
125 %indvars.iv.next23 = add i64 %indvars.iv22, 1
126 %lftr.wideiv25 = trunc i64 %indvars.iv.next23 to i32
127 %exitcond26 = icmp eq i32 %lftr.wideiv25, 128
128 br i1 %exitcond26, label %for.cond2.preheader, label %for.body
130 for.body4: ; preds = %for.body4, %for.cond2.preheader
131 %indvars.iv = phi i64 [ 0, %for.cond2.preheader ], [ %indvars.iv.next, %for.body4 ]
132 %z1.018 = phi i32 [ 0, %for.cond2.preheader ], [ %add8, %for.body4 ]
133 %4 = add nsw i64 %indvars.iv, %1
134 %arrayidx7 = getelementptr inbounds [128 x i32]* %stack, i64 0, i64 %4
135 %5 = load i32* %arrayidx7, align 4, !tbaa !0
136 %add8 = add nsw i32 %5, %z1.018
137 %indvars.iv.next = add i64 %indvars.iv, 1
138 %lftr.wideiv = trunc i64 %indvars.iv.next to i32
139 %exitcond = icmp eq i32 %lftr.wideiv, 128
140 br i1 %exitcond, label %for.end11, label %for.body4
142 for.end11: ; preds = %for.body4
146 attributes #0 = { readnone "target-cpu"="cyclone" }
147 attributes #1 = { "target-cpu"="cyclone" }
149 !0 = metadata !{metadata !"int", metadata !1}
150 !1 = metadata !{metadata !"omnipotent char", metadata !2}
151 !2 = metadata !{metadata !"Simple C/C++ TBAA"}
153 ; CHECK: .section __LD,__compact_unwind,regular,debug
154 ; CHECK: .quad _foo1 ; Range Start
155 ; CHECK: .long 33554432 ; Compact Unwind Encoding: 0x2000000
156 ; CHECK: .quad _foo2 ; Range Start
157 ; CHECK: .long 33591296 ; Compact Unwind Encoding: 0x2009000
158 ; CHECK: .quad _foo3 ; Range Start
159 ; CHECK: .long 33570831 ; Compact Unwind Encoding: 0x200400f
160 ; CHECK: .quad _foo4 ; Range Start
161 ; CHECK: .long 33689616 ; Compact Unwind Encoding: 0x2021010