1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1lanei8(i8* %A, <8 x i8>* %B) nounwind {
5 ;CHECK: vld1.8 {d16[3]}, [r0]
6 %tmp1 = load <8 x i8>* %B
7 %tmp2 = load i8* %A, align 1
8 %tmp3 = insertelement <8 x i8> %tmp1, i8 %tmp2, i32 3
12 define <4 x i16> @vld1lanei16(i16* %A, <4 x i16>* %B) nounwind {
14 ;CHECK: vld1.16 {d16[2]}, [r0]
15 %tmp1 = load <4 x i16>* %B
16 %tmp2 = load i16* %A, align 2
17 %tmp3 = insertelement <4 x i16> %tmp1, i16 %tmp2, i32 2
21 define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind {
23 ;CHECK: vld1.32 {d16[1]}, [r0]
24 %tmp1 = load <2 x i32>* %B
25 %tmp2 = load i32* %A, align 4
26 %tmp3 = insertelement <2 x i32> %tmp1, i32 %tmp2, i32 1
30 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
31 %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> }
32 %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> }
33 %struct.__neon_float32x2x2_t = type { <2 x float>, <2 x float> }
35 %struct.__neon_int16x8x2_t = type { <8 x i16>, <8 x i16> }
36 %struct.__neon_int32x4x2_t = type { <4 x i32>, <4 x i32> }
37 %struct.__neon_float32x4x2_t = type { <4 x float>, <4 x float> }
39 define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
41 ;Check the alignment value. Max for this instruction is 16 bits:
42 ;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16]
43 %tmp1 = load <8 x i8>* %B
44 %tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
45 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
46 %tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
47 %tmp5 = add <8 x i8> %tmp3, %tmp4
51 define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
53 ;Check the alignment value. Max for this instruction is 32 bits:
54 ;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32]
55 %tmp0 = bitcast i16* %A to i8*
56 %tmp1 = load <4 x i16>* %B
57 %tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
58 %tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
59 %tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
60 %tmp5 = add <4 x i16> %tmp3, %tmp4
64 define <2 x i32> @vld2lanei32(i32* %A, <2 x i32>* %B) nounwind {
67 %tmp0 = bitcast i32* %A to i8*
68 %tmp1 = load <2 x i32>* %B
69 %tmp2 = call %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
70 %tmp3 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 0
71 %tmp4 = extractvalue %struct.__neon_int32x2x2_t %tmp2, 1
72 %tmp5 = add <2 x i32> %tmp3, %tmp4
76 define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
79 %tmp0 = bitcast float* %A to i8*
80 %tmp1 = load <2 x float>* %B
81 %tmp2 = call %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
82 %tmp3 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 0
83 %tmp4 = extractvalue %struct.__neon_float32x2x2_t %tmp2, 1
84 %tmp5 = fadd <2 x float> %tmp3, %tmp4
88 define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
90 ;Check the (default) alignment.
91 ;CHECK: vld2.16 {d17[1], d19[1]}, [r0]
92 %tmp0 = bitcast i16* %A to i8*
93 %tmp1 = load <8 x i16>* %B
94 %tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
95 %tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
96 %tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
97 %tmp5 = add <8 x i16> %tmp3, %tmp4
101 define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
102 ;CHECK: vld2laneQi32:
103 ;Check the alignment value. Max for this instruction is 64 bits:
104 ;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]
105 %tmp0 = bitcast i32* %A to i8*
106 %tmp1 = load <4 x i32>* %B
107 %tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
108 %tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
109 %tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
110 %tmp5 = add <4 x i32> %tmp3, %tmp4
114 define <4 x float> @vld2laneQf(float* %A, <4 x float>* %B) nounwind {
117 %tmp0 = bitcast float* %A to i8*
118 %tmp1 = load <4 x float>* %B
119 %tmp2 = call %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
120 %tmp3 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 0
121 %tmp4 = extractvalue %struct.__neon_float32x4x2_t %tmp2, 1
122 %tmp5 = fadd <4 x float> %tmp3, %tmp4
123 ret <4 x float> %tmp5
126 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
127 declare %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
128 declare %struct.__neon_int32x2x2_t @llvm.arm.neon.vld2lane.v2i32(i8*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
129 declare %struct.__neon_float32x2x2_t @llvm.arm.neon.vld2lane.v2f32(i8*, <2 x float>, <2 x float>, i32, i32) nounwind readonly
131 declare %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8*, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
132 declare %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8*, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
133 declare %struct.__neon_float32x4x2_t @llvm.arm.neon.vld2lane.v4f32(i8*, <4 x float>, <4 x float>, i32, i32) nounwind readonly
135 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
136 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
137 %struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
138 %struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> }
140 %struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
141 %struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
142 %struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> }
144 define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind {
147 %tmp1 = load <8 x i8>* %B
148 %tmp2 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
149 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 0
150 %tmp4 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 1
151 %tmp5 = extractvalue %struct.__neon_int8x8x3_t %tmp2, 2
152 %tmp6 = add <8 x i8> %tmp3, %tmp4
153 %tmp7 = add <8 x i8> %tmp5, %tmp6
157 define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
159 ;Check the (default) alignment value. VLD3 does not support alignment.
160 ;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0]
161 %tmp0 = bitcast i16* %A to i8*
162 %tmp1 = load <4 x i16>* %B
163 %tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
164 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
165 %tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
166 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
167 %tmp6 = add <4 x i16> %tmp3, %tmp4
168 %tmp7 = add <4 x i16> %tmp5, %tmp6
172 define <2 x i32> @vld3lanei32(i32* %A, <2 x i32>* %B) nounwind {
175 %tmp0 = bitcast i32* %A to i8*
176 %tmp1 = load <2 x i32>* %B
177 %tmp2 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
178 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 0
179 %tmp4 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 1
180 %tmp5 = extractvalue %struct.__neon_int32x2x3_t %tmp2, 2
181 %tmp6 = add <2 x i32> %tmp3, %tmp4
182 %tmp7 = add <2 x i32> %tmp5, %tmp6
186 define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind {
189 %tmp0 = bitcast float* %A to i8*
190 %tmp1 = load <2 x float>* %B
191 %tmp2 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
192 %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 0
193 %tmp4 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 1
194 %tmp5 = extractvalue %struct.__neon_float32x2x3_t %tmp2, 2
195 %tmp6 = fadd <2 x float> %tmp3, %tmp4
196 %tmp7 = fadd <2 x float> %tmp5, %tmp6
197 ret <2 x float> %tmp7
200 define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
201 ;CHECK: vld3laneQi16:
202 ;Check the (default) alignment value. VLD3 does not support alignment.
203 ;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0]
204 %tmp0 = bitcast i16* %A to i8*
205 %tmp1 = load <8 x i16>* %B
206 %tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
207 %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
208 %tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
209 %tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
210 %tmp6 = add <8 x i16> %tmp3, %tmp4
211 %tmp7 = add <8 x i16> %tmp5, %tmp6
215 define <4 x i32> @vld3laneQi32(i32* %A, <4 x i32>* %B) nounwind {
216 ;CHECK: vld3laneQi32:
218 %tmp0 = bitcast i32* %A to i8*
219 %tmp1 = load <4 x i32>* %B
220 %tmp2 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 3, i32 1)
221 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 0
222 %tmp4 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 1
223 %tmp5 = extractvalue %struct.__neon_int32x4x3_t %tmp2, 2
224 %tmp6 = add <4 x i32> %tmp3, %tmp4
225 %tmp7 = add <4 x i32> %tmp5, %tmp6
229 define <4 x float> @vld3laneQf(float* %A, <4 x float>* %B) nounwind {
232 %tmp0 = bitcast float* %A to i8*
233 %tmp1 = load <4 x float>* %B
234 %tmp2 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
235 %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 0
236 %tmp4 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 1
237 %tmp5 = extractvalue %struct.__neon_float32x4x3_t %tmp2, 2
238 %tmp6 = fadd <4 x float> %tmp3, %tmp4
239 %tmp7 = fadd <4 x float> %tmp5, %tmp6
240 ret <4 x float> %tmp7
243 declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
244 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
245 declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
246 declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
248 declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
249 declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
250 declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly
252 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
253 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
254 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
255 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
257 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
258 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
259 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
261 define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
263 ;Check the alignment value. Max for this instruction is 32 bits:
264 ;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
265 %tmp1 = load <8 x i8>* %B
266 %tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
267 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
268 %tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
269 %tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
270 %tmp6 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 3
271 %tmp7 = add <8 x i8> %tmp3, %tmp4
272 %tmp8 = add <8 x i8> %tmp5, %tmp6
273 %tmp9 = add <8 x i8> %tmp7, %tmp8
277 define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
280 %tmp0 = bitcast i16* %A to i8*
281 %tmp1 = load <4 x i16>* %B
282 %tmp2 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
283 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 0
284 %tmp4 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 1
285 %tmp5 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 2
286 %tmp6 = extractvalue %struct.__neon_int16x4x4_t %tmp2, 3
287 %tmp7 = add <4 x i16> %tmp3, %tmp4
288 %tmp8 = add <4 x i16> %tmp5, %tmp6
289 %tmp9 = add <4 x i16> %tmp7, %tmp8
293 define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
295 ;Check the alignment value. Max for this instruction is 128 bits:
296 ;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
297 %tmp0 = bitcast i32* %A to i8*
298 %tmp1 = load <2 x i32>* %B
299 %tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
300 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
301 %tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
302 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
303 %tmp6 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 3
304 %tmp7 = add <2 x i32> %tmp3, %tmp4
305 %tmp8 = add <2 x i32> %tmp5, %tmp6
306 %tmp9 = add <2 x i32> %tmp7, %tmp8
310 define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind {
313 %tmp0 = bitcast float* %A to i8*
314 %tmp1 = load <2 x float>* %B
315 %tmp2 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8* %tmp0, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, <2 x float> %tmp1, i32 1, i32 1)
316 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 0
317 %tmp4 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 1
318 %tmp5 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 2
319 %tmp6 = extractvalue %struct.__neon_float32x2x4_t %tmp2, 3
320 %tmp7 = fadd <2 x float> %tmp3, %tmp4
321 %tmp8 = fadd <2 x float> %tmp5, %tmp6
322 %tmp9 = fadd <2 x float> %tmp7, %tmp8
323 ret <2 x float> %tmp9
326 define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
327 ;CHECK: vld4laneQi16:
328 ;Check the alignment value. Max for this instruction is 64 bits:
329 ;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64]
330 %tmp0 = bitcast i16* %A to i8*
331 %tmp1 = load <8 x i16>* %B
332 %tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16)
333 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
334 %tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
335 %tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
336 %tmp6 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 3
337 %tmp7 = add <8 x i16> %tmp3, %tmp4
338 %tmp8 = add <8 x i16> %tmp5, %tmp6
339 %tmp9 = add <8 x i16> %tmp7, %tmp8
343 define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
344 ;CHECK: vld4laneQi32:
345 ;Check the (default) alignment.
346 ;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
347 %tmp0 = bitcast i32* %A to i8*
348 %tmp1 = load <4 x i32>* %B
349 %tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
350 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
351 %tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
352 %tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2
353 %tmp6 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 3
354 %tmp7 = add <4 x i32> %tmp3, %tmp4
355 %tmp8 = add <4 x i32> %tmp5, %tmp6
356 %tmp9 = add <4 x i32> %tmp7, %tmp8
360 define <4 x float> @vld4laneQf(float* %A, <4 x float>* %B) nounwind {
363 %tmp0 = bitcast float* %A to i8*
364 %tmp1 = load <4 x float>* %B
365 %tmp2 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8* %tmp0, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, <4 x float> %tmp1, i32 1, i32 1)
366 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 0
367 %tmp4 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 1
368 %tmp5 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 2
369 %tmp6 = extractvalue %struct.__neon_float32x4x4_t %tmp2, 3
370 %tmp7 = fadd <4 x float> %tmp3, %tmp4
371 %tmp8 = fadd <4 x float> %tmp5, %tmp6
372 %tmp9 = fadd <4 x float> %tmp7, %tmp8
373 ret <4 x float> %tmp9
376 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
377 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4lane.v4i16(i8*, <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
378 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
379 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4lane.v2f32(i8*, <2 x float>, <2 x float>, <2 x float>, <2 x float>, i32, i32) nounwind readonly
381 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8*, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, i32, i32) nounwind readonly
382 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8*, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, i32, i32) nounwind readonly
383 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x float>, <4 x float>, i32, i32) nounwind readonly