1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1dupi8(i8* %A) nounwind {
5 ;Check the (default) alignment value.
6 ;CHECK: vld1.8 {d16[]}, [r0]
7 %tmp1 = load i8* %A, align 8
8 %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0
9 %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer
13 define <4 x i16> @vld1dupi16(i16* %A) nounwind {
15 ;Check the alignment value. Max for this instruction is 16 bits:
16 ;CHECK: vld1.16 {d16[]}, [r0, :16]
17 %tmp1 = load i16* %A, align 8
18 %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0
19 %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer
23 define <2 x i32> @vld1dupi32(i32* %A) nounwind {
25 ;Check the alignment value. Max for this instruction is 32 bits:
26 ;CHECK: vld1.32 {d16[]}, [r0, :32]
27 %tmp1 = load i32* %A, align 8
28 %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0
29 %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer
33 define <16 x i8> @vld1dupQi8(i8* %A) nounwind {
35 ;Check the (default) alignment value.
36 ;CHECK: vld1.8 {d16[], d17[]}, [r0]
37 %tmp1 = load i8* %A, align 8
38 %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0
39 %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitializer
43 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
44 %struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> }
46 define <8 x i8> @vld2dupi8(i8* %A) nounwind {
48 ;Check the (default) alignment value.
49 ;CHECK: vld2.8 {d16[], d17[]}, [r0]
50 %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1)
51 %tmp1 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 0
52 %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer
53 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 1
54 %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer
55 %tmp5 = add <8 x i8> %tmp2, %tmp4
59 define <2 x i32> @vld2dupi32(i32* %A) nounwind {
61 ;Check the alignment value. Max for this instruction is 64 bits:
62 ;CHECK: vld2.32 {d16[], d17[]}, [r0, :64]
63 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
64 %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0
65 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
66 %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1
67 %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer
68 %tmp5 = add <2 x i32> %tmp2, %tmp4
72 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
73 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
75 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
77 define <4 x i16> @vld3dupi16(i16* %A) nounwind {
79 ;Check the (default) alignment value. VLD3 does not support alignment.
80 ;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0]
81 %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
82 %tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0
83 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
84 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1
85 %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer
86 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 2
87 %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer
88 %tmp7 = add <4 x i16> %tmp2, %tmp4
89 %tmp8 = add <4 x i16> %tmp7, %tmp6
93 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
95 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
97 define <2 x i32> @vld4dupi32(i32* %A) nounwind {
99 ;Check the alignment value. Max for this instruction is 128 bits:
100 ;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :128]
101 %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 32)
102 %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0
103 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
104 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1
105 %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer
106 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 2
107 %tmp6 = shufflevector <2 x i32> %tmp5, <2 x i32> undef, <2 x i32> zeroinitializer
108 %tmp7 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 3
109 %tmp8 = shufflevector <2 x i32> %tmp7, <2 x i32> undef, <2 x i32> zeroinitializer
110 %tmp9 = add <2 x i32> %tmp2, %tmp4
111 %tmp10 = add <2 x i32> %tmp6, %tmp8
112 %tmp11 = add <2 x i32> %tmp9, %tmp10
116 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly