1 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
3 define <8 x i8> @vld1dupi8(i8* %A) nounwind {
5 ;Check the (default) alignment value.
6 ;CHECK: vld1.8 {d16[]}, [r0]
7 %tmp1 = load i8* %A, align 8
8 %tmp2 = insertelement <8 x i8> undef, i8 %tmp1, i32 0
9 %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <8 x i32> zeroinitializer
13 define <4 x i16> @vld1dupi16(i16* %A) nounwind {
15 ;Check the alignment value. Max for this instruction is 16 bits:
16 ;CHECK: vld1.16 {d16[]}, [r0, :16]
17 %tmp1 = load i16* %A, align 8
18 %tmp2 = insertelement <4 x i16> undef, i16 %tmp1, i32 0
19 %tmp3 = shufflevector <4 x i16> %tmp2, <4 x i16> undef, <4 x i32> zeroinitializer
23 define <2 x i32> @vld1dupi32(i32* %A) nounwind {
25 ;Check the alignment value. Max for this instruction is 32 bits:
26 ;CHECK: vld1.32 {d16[]}, [r0, :32]
27 %tmp1 = load i32* %A, align 8
28 %tmp2 = insertelement <2 x i32> undef, i32 %tmp1, i32 0
29 %tmp3 = shufflevector <2 x i32> %tmp2, <2 x i32> undef, <2 x i32> zeroinitializer
33 define <2 x float> @vld1dupf(float* %A) nounwind {
35 ;CHECK: vld1.32 {d16[]}, [r0]
36 %tmp0 = load float* %A
37 %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0
38 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer
42 define <16 x i8> @vld1dupQi8(i8* %A) nounwind {
44 ;Check the (default) alignment value.
45 ;CHECK: vld1.8 {d16[], d17[]}, [r0]
46 %tmp1 = load i8* %A, align 8
47 %tmp2 = insertelement <16 x i8> undef, i8 %tmp1, i32 0
48 %tmp3 = shufflevector <16 x i8> %tmp2, <16 x i8> undef, <16 x i32> zeroinitializer
52 define <4 x float> @vld1dupQf(float* %A) nounwind {
54 ;CHECK: vld1.32 {d16[], d17[]}, [r0]
55 %tmp0 = load float* %A
56 %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0
57 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer
61 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
62 %struct.__neon_int4x16x2_t = type { <4 x i16>, <4 x i16> }
63 %struct.__neon_int2x32x2_t = type { <2 x i32>, <2 x i32> }
65 define <8 x i8> @vld2dupi8(i8* %A) nounwind {
67 ;Check the (default) alignment value.
68 ;CHECK: vld2.8 {d16[], d17[]}, [r0]
69 %tmp0 = tail call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> undef, <8 x i8> undef, i32 0, i32 1)
70 %tmp1 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 0
71 %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer
72 %tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp0, 1
73 %tmp4 = shufflevector <8 x i8> %tmp3, <8 x i8> undef, <8 x i32> zeroinitializer
74 %tmp5 = add <8 x i8> %tmp2, %tmp4
78 define <4 x i16> @vld2dupi16(i16* %A) nounwind {
80 ;Check that a power-of-two alignment smaller than the total size of the memory
81 ;being loaded is ignored.
82 ;CHECK: vld2.16 {d16[], d17[]}, [r0]
83 %tmp0 = tail call %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, i32 0, i32 2)
84 %tmp1 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 0
85 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
86 %tmp3 = extractvalue %struct.__neon_int4x16x2_t %tmp0, 1
87 %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer
88 %tmp5 = add <4 x i16> %tmp2, %tmp4
92 define <2 x i32> @vld2dupi32(i32* %A) nounwind {
94 ;Check the alignment value. Max for this instruction is 64 bits:
95 ;CHECK: vld2.32 {d16[], d17[]}, [r0, :64]
96 %tmp0 = tail call %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, i32 0, i32 16)
97 %tmp1 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 0
98 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
99 %tmp3 = extractvalue %struct.__neon_int2x32x2_t %tmp0, 1
100 %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer
101 %tmp5 = add <2 x i32> %tmp2, %tmp4
105 declare %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8*, <8 x i8>, <8 x i8>, i32, i32) nounwind readonly
106 declare %struct.__neon_int4x16x2_t @llvm.arm.neon.vld2lane.v4i16(i16*, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
107 declare %struct.__neon_int2x32x2_t @llvm.arm.neon.vld2lane.v2i32(i32*, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly
109 %struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
111 define <4 x i16> @vld3dupi16(i16* %A) nounwind {
113 ;Check the (default) alignment value. VLD3 does not support alignment.
114 ;CHECK: vld3.16 {d16[], d17[], d18[]}, [r0]
115 %tmp0 = tail call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16* %A, <4 x i16> undef, <4 x i16> undef, <4 x i16> undef, i32 0, i32 8)
116 %tmp1 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 0
117 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer
118 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 1
119 %tmp4 = shufflevector <4 x i16> %tmp3, <4 x i16> undef, <4 x i32> zeroinitializer
120 %tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp0, 2
121 %tmp6 = shufflevector <4 x i16> %tmp5, <4 x i16> undef, <4 x i32> zeroinitializer
122 %tmp7 = add <4 x i16> %tmp2, %tmp4
123 %tmp8 = add <4 x i16> %tmp7, %tmp6
127 declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i16*, <4 x i16>, <4 x i16>, <4 x i16>, i32, i32) nounwind readonly
129 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
131 define <2 x i32> @vld4dupi32(i32* %A) nounwind {
133 ;Check the alignment value. An 8-byte alignment is allowed here even though
134 ;it is smaller than the total size of the memory being loaded.
135 ;CHECK: vld4.32 {d16[], d17[], d18[], d19[]}, [r0, :64]
136 %tmp0 = tail call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32* %A, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, <2 x i32> undef, i32 0, i32 8)
137 %tmp1 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 0
138 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer
139 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 1
140 %tmp4 = shufflevector <2 x i32> %tmp3, <2 x i32> undef, <2 x i32> zeroinitializer
141 %tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 2
142 %tmp6 = shufflevector <2 x i32> %tmp5, <2 x i32> undef, <2 x i32> zeroinitializer
143 %tmp7 = extractvalue %struct.__neon_int32x2x4_t %tmp0, 3
144 %tmp8 = shufflevector <2 x i32> %tmp7, <2 x i32> undef, <2 x i32> zeroinitializer
145 %tmp9 = add <2 x i32> %tmp2, %tmp4
146 %tmp10 = add <2 x i32> %tmp6, %tmp8
147 %tmp11 = add <2 x i32> %tmp9, %tmp10
151 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i32*, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, i32, i32) nounwind readonly